Reply by ti2tt April 14, 20092009-04-14
Hello,

I strongly agree with you OCY. But as Hugh said it was a misunderstanding of "+" and "|" operators. You must be a genuine C programmer to write a code in C. Thanks all of you for your kind help.

--- In m..., "old_cow_yellow" wrote:
>
> I think a bigger and broader problem is, people do not care about understanding even basic concepts. They rush into "send me sample code" or even "send me the code".
>
> This is especially a problem for a lot of self proclaimed c programmers. Yes, c is "easy to write" and "easy to understand". But it does not mean lazy and careless people can program correctly in c.
>
> --- In m..., Hugh Molesworth wrote:
> >
> > Also this is not (yet) your error, but keep in
> > mind that you potentially could introduce one of
> > the classic c errors caused by incorrectly using
> > operators. "+" means add two items together,
> > which you don't actually want; "|" means or two
> > items together, which you do want. If you want to
> > combine two bitfields in an "or" fashion, so the
> > result has a "1" in any bit where either of the
> > original operands have a "1". "+" will do this as
> > well, if you can guarantee that "1"s in each
> > operand do not overlap, but in your case they do not.
> >
> > Thus these two produce the same result:
> > 0x0001 + 0x0002 = 0x0003
> > 0x0001 | 0x0002 = 0x0003
> >
> > These two DO NOT produce the same result:
> > 0x0001 + 0x0001 = 0x0002
> > 0x0001 | 0x0001 = 0x0001
> >
> > So, for example, let's assume you forget that
> > WDT_ARST_1000 already encompasses WDTPW,
> > WDTCTL = WDTPW + WDT_ARST_1000;
> > is not the same as
> > WDTCTL = WDTPW | WDT_ARST_1000;
> >
> > Out of interest, TI, and hence IAR et al,
> > propagate this error since they uses "+" in their
> > own header files, but of course IAR et al are
> > careful to only use correct definition
> > combinations so it doesn't matter. Incorrectly
> > combining these declarations however, causes
> > grief, even when the combination looks reasonable.
> >
> > Hugh
> >
> > At 09:11 AM 4/13/2009, you wrote:
> > You have:
> >
> > ---quote---
> > void ResetWatchdog (void)
> > {
> > WDTCTL = WDTPW + WDTCNTCL; //Refresh watchdog counter
> > }
> > ---unquote---
> >
> > What does this procedure do? Is the Watchdog
> > still using ACLK after a call to ResetWatchdog()?
> >
> > You did not say what WDTCNTCL is defined to be.
> > But I suspect that it is 0x0008. In that case, the Watchdog will use SMCLK.
> >
> > Sorry that I did not give you the fish. And I did
> > not teach you how to fish either. I only tried to
> > remind you to use your head. I tried twice and
> > failed twice. I was not trying to be funny. The world is too funny already.
> >
> > --- In m..., "ti2tt" wrote:
> > >
> > > Hello,
> > >
> > > Below is the code I am using for watchdog,
> > >
> > > #define WDT_ARST_1000 (WDTPW+WDTCNTCL+WDTSSEL)
> > >
> > > void WatchdogHalt (void)
> > > {
> > > WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
> > > }
> > >
> > > void EnableWatchdog (void)
> > > {
> > > WDTCTL = WDT_ARST_1000;
> > > }
> > >
> > > void ResetWatchdog (void)
> > > {
> > > WDTCTL = WDTPW + WDTCNTCL; //Refresh watchdog counter
> > > }
> > >
> > > void main (void)
> > > {
> > > WatchdogHalt(); //Halt internal WDOG
> > > _SelectCrystalOsc(); //Configure XTAL
> > > EnableWatchdog(); //Enable internal WDOG
> > > ResetWatchdog(); //Reset internal WDOG
> > > while(1)
> > > {
> > > ResetWatchdog(); //Reset internal WDOG
> > > }
> > > }
> > >
> > > The bits related to watchdog sfrs are defined
> > in msp430F24x.h file. Please guide me.
> > >
> > > Thanks in advance.
> > > --- In m..., "old_cow_yellow" wrote:
> > > >
> > > > In your original posting, you said"
> > > >
> > > > "The refresh routine for watchdog counter consists as:
> > > > " WDTCTL = WDTPW + WDTCNTCL;"
> > > >
> > > > And you also said:
> > > >
> > > > "I am using ACLK as source for watchdog counter."
> > > >
> > > > I am not sure about that. I can only assume
> > that the #define(s) you used make "ACLK as source for watchdog counter".
> > > >
> > > > --OCY
> > > >
> > > > --- In m..., "ti2tt" wrote:
> > > > >
> > > > > Hi,
> > > > >
> > > > > As you all have seen that the #defines are
> > correct in the code but still my question remains
> > unanswered. I am handling the watchdog correctly
> > but at the same time after periodic refresh, I am
> > getting watchdog reset. Can anyone clarify this?
> > > > >
> > > > > Whether the use of ACLK for watchdog clock
> > source in my code which is 1MHz/32768 is
> > acceptable or not as the MCLK in my case is 250
> > KHz? Can anyone clarify this also?
> > > > >
> > > > > I badly need you people help for this. Thanks in advance.
> > > > > --- In m..., Joe Radomski wrote:
> > > > > >
> > > > > > You are correct.. I looked atthe
> > crossworks header file and it does indeed include
> > the password... so it wount reset, but my other
> > point is valid.. I'm not sure what header I
> > looked at initially that didn't� have the
> > password... I usually explicitly show the bits
> > when I do configurations, I don't make it a habit
> > of using defines like that so that it forces be
> > to make sure I handle things correctly, unless I
> > have to make the code compile for several devices
> > then these definitions work out better (for
> > example alkso having to have the code work on a
> > 5xx series which has an extra bit in the divider)
> > and don't have to add in as many conditional compiles...
> > > > > > �
> > > > > > the stopping of the WDT timer in his
> > first line is unnecessary as crossworks does it in startup.asm by default.
> > > > > > �
> > > > > >
> > > > > >
> > > > > > --- On Fri, 4/10/09, old_cow_yellow wrote:
> > > > > >
> > > > > > From: old_cow_yellow
> > > > > > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > > > > > To: m...
> > > > > > Date: Friday, April 10, 2009, 8:04 PM
> > > > > >
> > > > > >
> > > > > >
> > > > > >
> > > > > >
> > > > > >
> > > > > >
> > > > > >
> > > > > > Not really. It depends on what are defined as what.
> > > > > >
> > > > > > Many of the header files I have seen has effectively:
> > > > > > #define WDTCTL 0x0120
> > > > > > #define WDT_ARST_1000 0x5A0C
> > > > > >
> > > > > > Using such a header file, the statement:
> > > > > > WDTCTL = WDT_ARST_1000;
> > > > > > will not issue a Watchdog Password Violation reset
> > > > > >
> > > > > > On the other hand, if WDTCTL is defined
> > to be something other than 0x0120, the same
> > statement may have nothing to do with the Watchdog.
> > > > > >
> > > > > > What it appears to be saying is not
> > necessarily what you get. That is the unspecified
> > #define can do for you. And that is why I asked
> > would val=THREE resulted in val being set to 3.
> > > > > >
> > > > > > --- In msp430@yahoogroups. com, Joe Radomski wrote:
> > > > > > >
> > > > > > > you are correct.. the way hisexample
> > �is currently setting the register will issue
> > an immediate reset.. since no password is
> > provided, but if he does get it set correcty the
> > timeout period is very small and will probably reset anyway..
> > > > > > > �
> > > > > > > �
> > > > > > > �
> > > > > > > �
> > > > > > > �
> > > > > > >
> > > > > > >
> > > > > > > --- On Fri, 4/10/09, citymouse2u wrote:
> > > > > > >
> > > > > > > From: citymouse2u
> > > > > > > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > > > > > > To: msp430@yahoogroups. com
> > > > > > > Date: Friday, April 10, 2009, 1:24 PM
> > > > > > >
> > > > > > >
> > > > > > >
> > > > > > >
> > > > > > >
> > > > > > >
> > > > > > >
> > > > > > >
> > > > > > > I think you need to use:
> > > > > > > WDTCTL = WDTPW + WDT_ARST_1000;
> > > > > > > Changing the WD without the password will cause a watchdog reset.
> > > > > > >
> > > > > > > --- In msp430@yahoogroups. com, "ti2tt" wrote:
> > > > > > > >
> > > > > > > > Hello Forum members,
> > > > > > > >
> > > > > > > > I am using MSP430F2418 with
> > CrossStudio. I want to use internal watchdog of
> > this controller. I have configured the watchdog as
> > > > > > > >
> > > > > > > > WDTCTL = WDTPW + WDTHOLD;
> > > > > > > > WDTCTL = WDT_ARST_1000;
> > > > > > > >
> > > > > > > > The refresh routine for watchdog counter consists as:
> > > > > > > >
> > > > > > > > WDTCTL = WDTPW + WDTCNTCL;
> > > > > > > >
> > > > > > > > With this configuration, I am
> > getting a watchdog reset after certain intervals.
> > Here I am using a XTAL of 1MHz connected to XT1
> > pin. I have configured MCLK=250KHz and ACLK=1MHz.
> > I am using ACLK as source for watchdog counter.
> > > > > > > > What is the reason for watchdog
> > getting resetted? Is any other initialisation/
> > handling is required for the watchdog?
> > > > > > > >
> > > > > > > >
> > > > > > > > The datasheet for MSP430F2418 says
> > that "The WDT+ counter clock should be slower or
> > equal than the system (MCLK) frequency". Does
> > this mean that my clock source selection will not
> > work for watchdog? What combination I can use for
> > watchdog clock source? Has anyone faced any issue
> > other than this with the internal watchdog of MSP430?
> > > > > > > >
> > > > > > > > Your earliest help in this regard
> > will be highly appreciated. Thanks in advance.
> > > > > > > >
> > > > > > >
>

Beginning Microcontrollers with the MSP430

Reply by old_cow_yellow April 13, 20092009-04-13
I think a bigger and broader problem is, people do not care about understanding even basic concepts. They rush into "send me sample code" or even "send me the code".

This is especially a problem for a lot of self proclaimed c programmers. Yes, c is "easy to write" and "easy to understand". But it does not mean lazy and careless people can program correctly in c.

--- In m..., Hugh Molesworth wrote:
>
> Also this is not (yet) your error, but keep in
> mind that you potentially could introduce one of
> the classic c errors caused by incorrectly using
> operators. "+" means add two items together,
> which you don't actually want; "|" means or two
> items together, which you do want. If you want to
> combine two bitfields in an "or" fashion, so the
> result has a "1" in any bit where either of the
> original operands have a "1". "+" will do this as
> well, if you can guarantee that "1"s in each
> operand do not overlap, but in your case they do not.
>
> Thus these two produce the same result:
> 0x0001 + 0x0002 = 0x0003
> 0x0001 | 0x0002 = 0x0003
>
> These two DO NOT produce the same result:
> 0x0001 + 0x0001 = 0x0002
> 0x0001 | 0x0001 = 0x0001
>
> So, for example, let's assume you forget that
> WDT_ARST_1000 already encompasses WDTPW,
> WDTCTL = WDTPW + WDT_ARST_1000;
> is not the same as
> WDTCTL = WDTPW | WDT_ARST_1000;
>
> Out of interest, TI, and hence IAR et al,
> propagate this error since they uses "+" in their
> own header files, but of course IAR et al are
> careful to only use correct definition
> combinations so it doesn't matter. Incorrectly
> combining these declarations however, causes
> grief, even when the combination looks reasonable.
>
> Hugh
>
> At 09:11 AM 4/13/2009, you wrote:
> You have:
>
> ---quote---
> void ResetWatchdog (void)
> {
> WDTCTL = WDTPW + WDTCNTCL; //Refresh watchdog counter
> }
> ---unquote---
>
> What does this procedure do? Is the Watchdog
> still using ACLK after a call to ResetWatchdog()?
>
> You did not say what WDTCNTCL is defined to be.
> But I suspect that it is 0x0008. In that case, the Watchdog will use SMCLK.
>
> Sorry that I did not give you the fish. And I did
> not teach you how to fish either. I only tried to
> remind you to use your head. I tried twice and
> failed twice. I was not trying to be funny. The world is too funny already.
>
> --- In m..., "ti2tt" wrote:
> >
> > Hello,
> >
> > Below is the code I am using for watchdog,
> >
> > #define WDT_ARST_1000 (WDTPW+WDTCNTCL+WDTSSEL)
> >
> > void WatchdogHalt (void)
> > {
> > WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
> > }
> >
> > void EnableWatchdog (void)
> > {
> > WDTCTL = WDT_ARST_1000;
> > }
> >
> > void ResetWatchdog (void)
> > {
> > WDTCTL = WDTPW + WDTCNTCL; //Refresh watchdog counter
> > }
> >
> > void main (void)
> > {
> > WatchdogHalt(); //Halt internal WDOG
> > _SelectCrystalOsc(); //Configure XTAL
> > EnableWatchdog(); //Enable internal WDOG
> > ResetWatchdog(); //Reset internal WDOG
> > while(1)
> > {
> > ResetWatchdog(); //Reset internal WDOG
> > }
> > }
> >
> > The bits related to watchdog sfrs are defined
> in msp430F24x.h file. Please guide me.
> >
> > Thanks in advance.
> > --- In m..., "old_cow_yellow" wrote:
> > >
> > > In your original posting, you said"
> > >
> > > "The refresh routine for watchdog counter consists as:
> > > " WDTCTL = WDTPW + WDTCNTCL;"
> > >
> > > And you also said:
> > >
> > > "I am using ACLK as source for watchdog counter."
> > >
> > > I am not sure about that. I can only assume
> that the #define(s) you used make "ACLK as source for watchdog counter".
> > >
> > > --OCY
> > >
> > > --- In m..., "ti2tt" wrote:
> > > >
> > > > Hi,
> > > >
> > > > As you all have seen that the #defines are
> correct in the code but still my question remains
> unanswered. I am handling the watchdog correctly
> but at the same time after periodic refresh, I am
> getting watchdog reset. Can anyone clarify this?
> > > >
> > > > Whether the use of ACLK for watchdog clock
> source in my code which is 1MHz/32768 is
> acceptable or not as the MCLK in my case is 250
> KHz? Can anyone clarify this also?
> > > >
> > > > I badly need you people help for this. Thanks in advance.
> > > > --- In m..., Joe Radomski wrote:
> > > > >
> > > > > You are correct.. I looked atthe
> crossworks header file and it does indeed include
> the password... so it wount reset, but my other
> point is valid.. I'm not sure what header I
> looked at initially that didn't� have the
> password... I usually explicitly show the bits
> when I do configurations, I don't make it a habit
> of using defines like that so that it forces be
> to make sure I handle things correctly, unless I
> have to make the code compile for several devices
> then these definitions work out better (for
> example alkso having to have the code work on a
> 5xx series which has an extra bit in the divider)
> and don't have to add in as many conditional compiles...
> > > > > �
> > > > > the stopping of the WDT timer in his
> first line is unnecessary as crossworks does it in startup.asm by default.
> > > > > �
> > > > >
> > > > >
> > > > > --- On Fri, 4/10/09, old_cow_yellow wrote:
> > > > >
> > > > > From: old_cow_yellow
> > > > > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > > > > To: m...
> > > > > Date: Friday, April 10, 2009, 8:04 PM
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > > Not really. It depends on what are defined as what.
> > > > >
> > > > > Many of the header files I have seen has effectively:
> > > > > #define WDTCTL 0x0120
> > > > > #define WDT_ARST_1000 0x5A0C
> > > > >
> > > > > Using such a header file, the statement:
> > > > > WDTCTL = WDT_ARST_1000;
> > > > > will not issue a Watchdog Password Violation reset
> > > > >
> > > > > On the other hand, if WDTCTL is defined
> to be something other than 0x0120, the same
> statement may have nothing to do with the Watchdog.
> > > > >
> > > > > What it appears to be saying is not
> necessarily what you get. That is the unspecified
> #define can do for you. And that is why I asked
> would val=THREE resulted in val being set to 3.
> > > > >
> > > > > --- In msp430@yahoogroups. com, Joe Radomski wrote:
> > > > > >
> > > > > > you are correct.. the way hisexample
> �is currently setting the register will issue
> an immediate reset.. since no password is
> provided, but if he does get it set correcty the
> timeout period is very small and will probably reset anyway..
> > > > > > �
> > > > > > �
> > > > > > �
> > > > > > �
> > > > > > �
> > > > > >
> > > > > >
> > > > > > --- On Fri, 4/10/09, citymouse2u wrote:
> > > > > >
> > > > > > From: citymouse2u
> > > > > > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > > > > > To: msp430@yahoogroups. com
> > > > > > Date: Friday, April 10, 2009, 1:24 PM
> > > > > >
> > > > > >
> > > > > >
> > > > > >
> > > > > >
> > > > > >
> > > > > >
> > > > > >
> > > > > > I think you need to use:
> > > > > > WDTCTL = WDTPW + WDT_ARST_1000;
> > > > > > Changing the WD without the password will cause a watchdog reset.
> > > > > >
> > > > > > --- In msp430@yahoogroups. com, "ti2tt" wrote:
> > > > > > >
> > > > > > > Hello Forum members,
> > > > > > >
> > > > > > > I am using MSP430F2418 with
> CrossStudio. I want to use internal watchdog of
> this controller. I have configured the watchdog as
> > > > > > >
> > > > > > > WDTCTL = WDTPW + WDTHOLD;
> > > > > > > WDTCTL = WDT_ARST_1000;
> > > > > > >
> > > > > > > The refresh routine for watchdog counter consists as:
> > > > > > >
> > > > > > > WDTCTL = WDTPW + WDTCNTCL;
> > > > > > >
> > > > > > > With this configuration, I am
> getting a watchdog reset after certain intervals.
> Here I am using a XTAL of 1MHz connected to XT1
> pin. I have configured MCLK=250KHz and ACLK=1MHz.
> I am using ACLK as source for watchdog counter.
> > > > > > > What is the reason for watchdog
> getting resetted? Is any other initialisation/
> handling is required for the watchdog?
> > > > > > >
> > > > > > >
> > > > > > > The datasheet for MSP430F2418 says
> that "The WDT+ counter clock should be slower or
> equal than the system (MCLK) frequency". Does
> this mean that my clock source selection will not
> work for watchdog? What combination I can use for
> watchdog clock source? Has anyone faced any issue
> other than this with the internal watchdog of MSP430?
> > > > > > >
> > > > > > > Your earliest help in this regard
> will be highly appreciated. Thanks in advance.
> > > > > > >
> > > > >

Reply by Hugh Molesworth April 13, 20092009-04-13
Also this is not (yet) your error, but keep in
mind that you potentially could introduce one of
the classic c errors caused by incorrectly using
operators. "+" means add two items together,
which you don't actually want; "|" means or two
items together, which you do want. If you want to
combine two bitfields in an "or" fashion, so the
result has a "1" in any bit where either of the
original operands have a "1". "+" will do this as
well, if you can guarantee that "1"s in each
operand do not overlap, but in your case they do not.

Thus these two produce the same result:
0x0001 + 0x0002 = 0x0003
0x0001 | 0x0002 = 0x0003

These two DO NOT produce the same result:
0x0001 + 0x0001 = 0x0002
0x0001 | 0x0001 = 0x0001

So, for example, let's assume you forget that
WDT_ARST_1000 already encompasses WDTPW,
WDTCTL = WDTPW + WDT_ARST_1000;
is not the same as
WDTCTL = WDTPW | WDT_ARST_1000;

Out of interest, TI, and hence IAR et al,
propagate this error since they uses "+" in their
own header files, but of course IAR et al are
careful to only use correct definition
combinations so it doesn't matter. Incorrectly
combining these declarations however, causes
grief, even when the combination looks reasonable.

Hugh

At 09:11 AM 4/13/2009, you wrote:
You have:

---quote---
void ResetWatchdog (void)
{
WDTCTL = WDTPW + WDTCNTCL; //Refresh watchdog counter
}
---unquote---

What does this procedure do? Is the Watchdog
still using ACLK after a call to ResetWatchdog()?

You did not say what WDTCNTCL is defined to be.
But I suspect that it is 0x0008. In that case, the Watchdog will use SMCLK.

Sorry that I did not give you the fish. And I did
not teach you how to fish either. I only tried to
remind you to use your head. I tried twice and
failed twice. I was not trying to be funny. The world is too funny already.

--- In m..., "ti2tt" wrote:
>
> Hello,
>
> Below is the code I am using for watchdog,
>
> #define WDT_ARST_1000 (WDTPW+WDTCNTCL+WDTSSEL)
>
> void WatchdogHalt (void)
> {
> WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
> }
>
> void EnableWatchdog (void)
> {
> WDTCTL = WDT_ARST_1000;
> }
>
> void ResetWatchdog (void)
> {
> WDTCTL = WDTPW + WDTCNTCL; //Refresh watchdog counter
> }
>
> void main (void)
> {
> WatchdogHalt(); //Halt internal WDOG
> _SelectCrystalOsc(); //Configure XTAL
> EnableWatchdog(); //Enable internal WDOG
> ResetWatchdog(); //Reset internal WDOG
> while(1)
> {
> ResetWatchdog(); //Reset internal WDOG
> }
> }
>
> The bits related to watchdog sfrs are defined
in msp430F24x.h file. Please guide me.
>
> Thanks in advance.
> --- In m..., "old_cow_yellow" wrote:
> >
> > In your original posting, you said"
> >
> > "The refresh routine for watchdog counter consists as:
> > " WDTCTL = WDTPW + WDTCNTCL;"
> >
> > And you also said:
> >
> > "I am using ACLK as source for watchdog counter."
> >
> > I am not sure about that. I can only assume
that the #define(s) you used make "ACLK as source for watchdog counter".
> >
> > --OCY
> >
> > --- In m..., "ti2tt" wrote:
> > >
> > > Hi,
> > >
> > > As you all have seen that the #defines are
correct in the code but still my question remains
unanswered. I am handling the watchdog correctly
but at the same time after periodic refresh, I am
getting watchdog reset. Can anyone clarify this?
> > >
> > > Whether the use of ACLK for watchdog clock
source in my code which is 1MHz/32768 is
acceptable or not as the MCLK in my case is 250
KHz? Can anyone clarify this also?
> > >
> > > I badly need you people help for this. Thanks in advance.
> > > --- In m..., Joe Radomski wrote:
> > > >
> > > > You are correct.. I looked atthe
crossworks header file and it does indeed include
the password... so it wount reset, but my other
point is valid.. I'm not sure what header I
looked at initially that didn't� have the
password... I usually explicitly show the bits
when I do configurations, I don't make it a habit
of using defines like that so that it forces be
to make sure I handle things correctly, unless I
have to make the code compile for several devices
then these definitions work out better (for
example alkso having to have the code work on a
5xx series which has an extra bit in the divider)
and don't have to add in as many conditional compiles...
> > > > �
> > > > the stopping of the WDT timer in his
first line is unnecessary as crossworks does it in startup.asm by default.
> > > > �
> > > >
> > > >
> > > > --- On Fri, 4/10/09, old_cow_yellow wrote:
> > > >
> > > > From: old_cow_yellow
> > > > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > > > To: m...
> > > > Date: Friday, April 10, 2009, 8:04 PM
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > > Not really. It depends on what are defined as what.
> > > >
> > > > Many of the header files I have seen has effectively:
> > > > #define WDTCTL 0x0120
> > > > #define WDT_ARST_1000 0x5A0C
> > > >
> > > > Using such a header file, the statement:
> > > > WDTCTL = WDT_ARST_1000;
> > > > will not issue a Watchdog Password Violation reset
> > > >
> > > > On the other hand, if WDTCTL is defined
to be something other than 0x0120, the same
statement may have nothing to do with the Watchdog.
> > > >
> > > > What it appears to be saying is not
necessarily what you get. That is the unspecified
#define can do for you. And that is why I asked
would val=THREE resulted in val being set to 3.
> > > >
> > > > --- In msp430@yahoogroups. com, Joe Radomski wrote:
> > > > >
> > > > > you are correct.. the way hisexample
�is currently setting the register will issue
an immediate reset.. since no password is
provided, but if he does get it set correcty the
timeout period is very small and will probably reset anyway..
> > > > > �
> > > > > �
> > > > > �
> > > > > �
> > > > > �
> > > > >
> > > > >
> > > > > --- On Fri, 4/10/09, citymouse2u wrote:
> > > > >
> > > > > From: citymouse2u
> > > > > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > > > > To: msp430@yahoogroups. com
> > > > > Date: Friday, April 10, 2009, 1:24 PM
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > > I think you need to use:
> > > > > WDTCTL = WDTPW + WDT_ARST_1000;
> > > > > Changing the WD without the password will cause a watchdog reset.
> > > > >
> > > > > --- In msp430@yahoogroups. com, "ti2tt" wrote:
> > > > > >
> > > > > > Hello Forum members,
> > > > > >
> > > > > > I am using MSP430F2418 with
CrossStudio. I want to use internal watchdog of
this controller. I have configured the watchdog as
> > > > > >
> > > > > > WDTCTL = WDTPW + WDTHOLD;
> > > > > > WDTCTL = WDT_ARST_1000;
> > > > > >
> > > > > > The refresh routine for watchdog counter consists as:
> > > > > >
> > > > > > WDTCTL = WDTPW + WDTCNTCL;
> > > > > >
> > > > > > With this configuration, I am
getting a watchdog reset after certain intervals.
Here I am using a XTAL of 1MHz connected to XT1
pin. I have configured MCLK=250KHz and ACLK=1MHz.
I am using ACLK as source for watchdog counter.
> > > > > > What is the reason for watchdog
getting resetted? Is any other initialisation/
handling is required for the watchdog?
> > > > > >
> > > > > >
> > > > > > The datasheet for MSP430F2418 says
that "The WDT+ counter clock should be slower or
equal than the system (MCLK) frequency". Does
this mean that my clock source selection will not
work for watchdog? What combination I can use for
watchdog clock source? Has anyone faced any issue
other than this with the internal watchdog of MSP430?
> > > > > >
> > > > > > Your earliest help in this regard
will be highly appreciated. Thanks in advance.
> > > > > >
> > > > >

Reply by old_cow_yellow April 13, 20092009-04-13
You have:

---quote---
void ResetWatchdog (void)
{
WDTCTL = WDTPW + WDTCNTCL; //Refresh watchdog counter
}
---unquote---

What does this procedure do? Is the Watchdog still using ACLK after a call to ResetWatchdog()?

You did not say what WDTCNTCL is defined to be. But I suspect that it is 0x0008. In that case, the Watchdog will use SMCLK.

Sorry that I did not give you the fish. And I did not teach you how to fish either. I only tried to remind you to use your head. I tried twice and failed twice. I was not trying to be funny. The world is too funny already.

--- In m..., "ti2tt" wrote:
>
> Hello,
>
> Below is the code I am using for watchdog,
>
> #define WDT_ARST_1000 (WDTPW+WDTCNTCL+WDTSSEL)
>
> void WatchdogHalt (void)
> {
> WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
> }
>
> void EnableWatchdog (void)
> {
> WDTCTL = WDT_ARST_1000;
> }
>
> void ResetWatchdog (void)
> {
> WDTCTL = WDTPW + WDTCNTCL; //Refresh watchdog counter
> }
>
> void main (void)
> {
> WatchdogHalt(); //Halt internal WDOG
> _SelectCrystalOsc(); //Configure XTAL
> EnableWatchdog(); //Enable internal WDOG
> ResetWatchdog(); //Reset internal WDOG
> while(1)
> {
> ResetWatchdog(); //Reset internal WDOG
> }
> }
>
> The bits related to watchdog sfrs are defined in msp430F24x.h file. Please guide me.
>
> Thanks in advance.
> --- In m..., "old_cow_yellow" wrote:
> >
> > In your original posting, you said"
> >
> > "The refresh routine for watchdog counter consists as:
> > " WDTCTL = WDTPW + WDTCNTCL;"
> >
> > And you also said:
> >
> > "I am using ACLK as source for watchdog counter."
> >
> > I am not sure about that. I can only assume that the #define(s) you used make "ACLK as source for watchdog counter".
> >
> > --OCY
> >
> > --- In m..., "ti2tt" wrote:
> > >
> > > Hi,
> > >
> > > As you all have seen that the #defines are correct in the code but still my question remains unanswered. I am handling the watchdog correctly but at the same time after periodic refresh, I am getting watchdog reset. Can anyone clarify this?
> > >
> > > Whether the use of ACLK for watchdog clock source in my code which is 1MHz/32768 is acceptable or not as the MCLK in my case is 250 KHz? Can anyone clarify this also?
> > >
> > > I badly need you people help for this. Thanks in advance.
> > > --- In m..., Joe Radomski wrote:
> > > >
> > > > You are correct.. I looked atthe crossworks header file and it does indeed include the password... so it wount reset, but my other point is valid.. I'm not sure what header I looked at initially that didn't� have the password... I usually explicitly show the bits when I do configurations, I don't make it a habit of using defines like that so that it forces be to make sure I handle things correctly, unless I have to make the code compile for several devices then these definitions work out better (for example alkso having to have the code work on a 5xx series which has an extra bit in the divider) and don't have to add in as many conditional compiles...
> > > > �
> > > > the stopping of the WDT timer in his first line is unnecessary as crossworks does it in startup.asm by default.
> > > > �
> > > >
> > > >
> > > > --- On Fri, 4/10/09, old_cow_yellow wrote:
> > > >
> > > > From: old_cow_yellow
> > > > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > > > To: m...
> > > > Date: Friday, April 10, 2009, 8:04 PM
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > > Not really. It depends on what are defined as what.
> > > >
> > > > Many of the header files I have seen has effectively:
> > > > #define WDTCTL 0x0120
> > > > #define WDT_ARST_1000 0x5A0C
> > > >
> > > > Using such a header file, the statement:
> > > > WDTCTL = WDT_ARST_1000;
> > > > will not issue a Watchdog Password Violation reset
> > > >
> > > > On the other hand, if WDTCTL is defined to be something other than 0x0120, the same statement may have nothing to do with the Watchdog.
> > > >
> > > > What it appears to be saying is not necessarily what you get. That is the unspecified #define can do for you. And that is why I asked would val=THREE resulted in val being set to 3.
> > > >
> > > > --- In msp430@yahoogroups. com, Joe Radomski wrote:
> > > > >
> > > > > you are correct.. the way hisexample �is currently setting the register will issue an immediate reset.. since no password is provided, but if he does get it set correcty the timeout period is very small and will probably reset anyway..
> > > > > �
> > > > > �
> > > > > �
> > > > > �
> > > > > �
> > > > >
> > > > >
> > > > > --- On Fri, 4/10/09, citymouse2u wrote:
> > > > >
> > > > > From: citymouse2u
> > > > > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > > > > To: msp430@yahoogroups. com
> > > > > Date: Friday, April 10, 2009, 1:24 PM
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > > I think you need to use:
> > > > > WDTCTL = WDTPW + WDT_ARST_1000;
> > > > > Changing the WD without the password will cause a watchdog reset.
> > > > >
> > > > > --- In msp430@yahoogroups. com, "ti2tt" wrote:
> > > > > >
> > > > > > Hello Forum members,
> > > > > >
> > > > > > I am using MSP430F2418 with CrossStudio. I want to use internal watchdog of this controller. I have configured the watchdog as
> > > > > >
> > > > > > WDTCTL = WDTPW + WDTHOLD;
> > > > > > WDTCTL = WDT_ARST_1000;
> > > > > >
> > > > > > The refresh routine for watchdog counter consists as:
> > > > > >
> > > > > > WDTCTL = WDTPW + WDTCNTCL;
> > > > > >
> > > > > > With this configuration, I am getting a watchdog reset after certain intervals. Here I am using a XTAL of 1MHz connected to XT1 pin. I have configured MCLK=250KHz and ACLK=1MHz. I am using ACLK as source for watchdog counter.
> > > > > > What is the reason for watchdog getting resetted? Is any other initialisation/ handling is required for the watchdog?
> > > > > >
> > > > > >
> > > > > > The datasheet for MSP430F2418 says that "The WDT+ counter clock should be slower or equal than the system (MCLK) frequency". Does this mean that my clock source selection will not work for watchdog? What combination I can use for watchdog clock source? Has anyone faced any issue other than this with the internal watchdog of MSP430?
> > > > > >
> > > > > > Your earliest help in this regard will be highly appreciated. Thanks in advance.
> > > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > >
>

Reply by Joe Radomski April 13, 20092009-04-13
I am not sure ths will make a differnece, but all my working code that uses aclk for wdt,I ALWAYS use the value for both the setting of the interval and resetting the time when using aclk.. looking at the schematic of the wdt module the clock select bits directly feed the divider.. (I actuay have the reset followed by the setting of a new interval)

I know it works, I think I added the setting of the interval becuase the wdt timer wasnt workig and I never went back to investigate if I needed both.. This was a very long time ago and I have just been using the samefunction over and over..( a 0 on the clk sel bit selects the smclk on the 2419 and otehrs)... I think only the restting using the entire definition is necessary, if either works for you please let me know which ones so that I can update my notes..

--- On Mon, 4/13/09, ti2tt wrote:

From: ti2tt
Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
To: m...
Date: Monday, April 13, 2009, 4:22 AM

Hello,

Below is the code I am using for watchdog,

#define WDT_ARST_1000 (WDTPW+WDTCNTCL+ WDTSSEL)

void WatchdogHalt (void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
}

void EnableWatchdog (void)
{
WDTCTL = WDT_ARST_1000;
}

void ResetWatchdog (void)
{
WDTCTL = WDTPW + WDTCNTCL; //Refresh watchdog counter
}

void main (void)
{
WatchdogHalt( ); //Halt internal WDOG
_SelectCrystalOsc( ); //Configure XTAL
EnableWatchdog( ); //Enable internal WDOG
ResetWatchdog( ); //Reset internal WDOG
while(1)
{
ResetWatchdog( ); //Reset internal WDOG
}
}

The bits related to watchdog sfrs are defined in msp430F24x.h file. Please guide me.

Thanks in advance.
--- In msp430@yahoogroups. com, "old_cow_yellow" wrote:
>
> In your original posting, you said"
>
> "The refresh routine for watchdog counter consists as:
> " WDTCTL = WDTPW + WDTCNTCL;"
>
> And you also said:
>
> "I am using ACLK as source for watchdog counter."
>
> I am not sure about that. I can only assume that the #define(s) you used make "ACLK as source for watchdog counter".
>
> --OCY
>
> --- In msp430@yahoogroups. com, "ti2tt" wrote:
> >
> > Hi,
> >
> > As you all have seen that the #defines are correct in the code but still my question remains unanswered. I am handling the watchdog correctly but at the same time after periodic refresh, I am getting watchdog reset. Can anyone clarify this?
> >
> > Whether the use of ACLK for watchdog clock source in my code which is 1MHz/32768 is acceptable or not as the MCLK in my case is 250 KHz? Can anyone clarify this also?
> >
> > I badly need you people help for this. Thanks in advance.
> > --- In msp430@yahoogroups. com, Joe Radomski wrote:
> > >
> > > You are correct.. I looked atthe crossworks header file and it does indeed include the password... so it wount reset, but my other point is valid.. I'm not sure what header I looked at initially that didn't� have the password... I usually explicitly show the bits when I do configurations, I don't make it a habit of using defines like that so that it forces be to make sure I handle things correctly, unless I have to make the code compile for several devices then these definitions work out better (for example alkso having to have the code work on a 5xx series which has an extra bit in the divider) and don't have to add in as many conditional compiles...
> > > �
> > > the stopping of the WDT timer in his first line is unnecessary as crossworks does it in startup.asm by default.
> > > �
> > >
> > >
> > > --- On Fri, 4/10/09, old_cow_yellow wrote:
> > >
> > > From: old_cow_yellow
> > > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > > To: msp430@yahoogroups. com
> > > Date: Friday, April 10, 2009, 8:04 PM
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > Not really. It depends on what are defined as what.
> > >
> > > Many of the header files I have seen has effectively:
> > > #define WDTCTL 0x0120
> > > #define WDT_ARST_1000 0x5A0C
> > >
> > > Using such a header file, the statement:
> > > WDTCTL = WDT_ARST_1000;
> > > will not issue a Watchdog Password Violation reset
> > >
> > > On the other hand, if WDTCTL is defined to be something other than 0x0120, the same statement may have nothing to do with the Watchdog.
> > >
> > > What it appears to be saying is not necessarily what you get. That is the unspecified #define can do for you. And that is why I asked would val=THREE resulted in val being set to 3.
> > >
> > > --- In msp430@yahoogroups. com, Joe Radomski wrote:
> > > >
> > > > you are correct.. the way hisexample �is currently setting the register will issue an immediate reset.. since no password is provided, but if he does get it set correcty the timeout period is very small and will probably reset anyway..
> > > > �
> > > > �
> > > > �
> > > > �
> > > > �
> > > >
> > > >
> > > > --- On Fri, 4/10/09, citymouse2u wrote:
> > > >
> > > > From: citymouse2u
> > > > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > > > To: msp430@yahoogroups. com
> > > > Date: Friday, April 10, 2009, 1:24 PM
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > > I think you need to use:
> > > > WDTCTL = WDTPW + WDT_ARST_1000;
> > > > Changing the WD without the password will cause a watchdog reset.
> > > >
> > > > --- In msp430@yahoogroups. com, "ti2tt" wrote:
> > > > >
> > > > > Hello Forum members,
> > > > >
> > > > > I am using MSP430F2418 with CrossStudio. I want to use internal watchdog of this controller. I have configured the watchdog as
> > > > >
> > > > > WDTCTL = WDTPW + WDTHOLD;
> > > > > WDTCTL = WDT_ARST_1000;
> > > > >
> > > > > The refresh routine for watchdog counter consists as:
> > > > >
> > > > > WDTCTL = WDTPW + WDTCNTCL;
> > > > >
> > > > > With this configuration, I am getting a watchdog reset after certain intervals. Here I am using a XTAL of 1MHz connected to XT1 pin. I have configured MCLK=250KHz and ACLK=1MHz. I am using ACLK as source for watchdog counter.
> > > > > What is the reason for watchdog getting resetted? Is any other initialisation/ handling is required for the watchdog?
> > > > >
> > > > >
> > > > > The datasheet for MSP430F2418 says that "The WDT+ counter clock should be slower or equal than the system (MCLK) frequency". Does this mean that my clock source selection will not work for watchdog? What combination I can use for watchdog clock source? Has anyone faced any issue other than this with the internal watchdog of MSP430?
> > > > >
> > > > > Your earliest help in this regard will be highly appreciated. Thanks in advance.
> > > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
>



Reply by ti2tt April 13, 20092009-04-13
Hello,

The clock stability I have checked before assigning ACLK. This I have ensured on oscilloscope by outputting the signal to i/o pin. Is there any other settings required to use the internal watchdog? any working code for this will be much helpful.

Thanks in advance.

--- In m..., Joe Radomski wrote:
>
> usually before you source anything off an external xtal you should test that it is stable, then once the osc fault flags are clear then switch your source to that clock. in this case you can set up the aclk divider immediately but you should not proceed on enabling functions like the wd timer until you know the clock is stable by checking the fault flags..
>
>
>
>
>
> --- On Mon, 4/13/09, ti2tt wrote:
>
> From: ti2tt
> Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> To: m...
> Date: Monday, April 13, 2009, 3:20 AM
>
>
>
>
>
>
>
>
> Hello,
>
> I am using a 1MHz XTAL at LFXT1 and dividing by 1 to get ACLK = 1MHz as below,
> BIC #OSCOFF,SR // Turn on osc.
> BIS.B #XTS+DIVA_0, &BCSCTL1 // HF mode //ACLK Divide by 1
>
> I have checked this on DSO by outputting to an i/o pin. Is anything incorrect in this configuration?
>
> Thanks in advance.
> --- In msp430@yahoogroups. com, Joe Radomski wrote:
> >
> > We need a few things cleared up.. You say you are using aclk at 1mhz, ACLK can only be sourced by LFXT1 (in LFMODE)or VLOCLK on the 2419.. Output aclk onto one of the pins and measure it with a scope..
> >
> > So how are you sourcing it with 1mhz??
> >
> > The max freq for lfmode (ext xtal) is 50khz.. the source to ACLK also has minimum pulse filter..
> >
> >
> > --- On Sat, 4/11/09, ti2tt wrote:
> >
> > From: ti2tt
> > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > To: msp430@yahoogroups. com
> > Date: Saturday, April 11, 2009, 6:55 AM
> >
> >
> >
> >
> >
> >
> >
> >
> > Hi,
> >
> > As you all have seen that the #defines are correct in the code but still my question remains unanswered. I am handling the watchdog correctly but at the same time after periodic refresh, I am getting watchdog reset. Can anyone clarify this?
> >
> > Whether the use of ACLK for watchdog clock source in my code which is 1MHz/32768 is acceptable or not as the MCLK in my case is 250 KHz? Can anyone clarify this also?
> >
> > I badly need you people help for this. Thanks in advance.
> > --- In msp430@yahoogroups. com, Joe Radomski wrote:
> > >
> > > You are correct.. I looked atthe crossworks header file and it does indeed include the password... so it wount reset, but my other point is valid.. I'm not sure what header I looked at initially that didn't have the password... I usually explicitly show the bits when I do configurations, I don't make it a habit of using defines like that so that it forces be to make sure I handle things correctly, unless I have to make the code compile for several devices then these definitions work out better (for example alkso having to have the code work on a 5xx series which has an extra bit in the divider) and don't have to add in as many conditional compiles...
> > >
> > > the stopping of the WDT timer in his first line is unnecessary as crossworks does it in startup.asm by default.
> > >
> > >
> > >
> > > --- On Fri, 4/10/09, old_cow_yellow wrote:
> > >
> > > From: old_cow_yellow
> > > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > > To: msp430@yahoogroups. com
> > > Date: Friday, April 10, 2009, 8:04 PM
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > Not really. It depends on what are defined as what.
> > >
> > > Many of the header files I have seen has effectively:
> > > #define WDTCTL 0x0120
> > > #define WDT_ARST_1000 0x5A0C
> > >
> > > Using such a header file, the statement:
> > > WDTCTL = WDT_ARST_1000;
> > > will not issue a Watchdog Password Violation reset
> > >
> > > On the other hand, if WDTCTL is defined to be something other than 0x0120, the same statement may have nothing to do with the Watchdog.
> > >
> > > What it appears to be saying is not necessarily what you get. That is the unspecified #define can do for you. And that is why I asked would val=THREE resulted in val being set to 3.
> > >
> > > --- In msp430@yahoogroups. com, Joe Radomski wrote:
> > > >
> > > > you are correct.. the way hisexample is currently setting the register will issue an immediate reset.. since no password is provided, but if he does get it set correcty the timeout period is very small and will probably reset anyway..
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > > --- On Fri, 4/10/09, citymouse2u wrote:
> > > >
> > > > From: citymouse2u
> > > > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > > > To: msp430@yahoogroups. com
> > > > Date: Friday, April 10, 2009, 1:24 PM
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > > I think you need to use:
> > > > WDTCTL = WDTPW + WDT_ARST_1000;
> > > > Changing the WD without the password will cause a watchdog reset.
> > > >
> > > > --- In msp430@yahoogroups. com, "ti2tt" wrote:
> > > > >
> > > > > Hello Forum members,
> > > > >
> > > > > I am using MSP430F2418 with CrossStudio. I want to use internal watchdog of this controller. I have configured the watchdog as
> > > > >
> > > > > WDTCTL = WDTPW + WDTHOLD;
> > > > > WDTCTL = WDT_ARST_1000;
> > > > >
> > > > > The refresh routine for watchdog counter consists as:
> > > > >
> > > > > WDTCTL = WDTPW + WDTCNTCL;
> > > > >
> > > > > With this configuration, I am getting a watchdog reset after certain intervals. Here I am using a XTAL of 1MHz connected to XT1 pin. I have configured MCLK=250KHz and ACLK=1MHz. I am using ACLK as source for watchdog counter.
> > > > > What is the reason for watchdog getting resetted? Is any other initialisation/ handling is required for the watchdog?
> > > > >
> > > > >
> > > > > The datasheet for MSP430F2418 says that "The WDT+ counter clock should be slower or equal than the system (MCLK) frequency". Does this mean that my clock source selection will not work for watchdog? What combination I can use for watchdog clock source? Has anyone faced any issue other than this with the internal watchdog of MSP430?
> > > > >
> > > > > Your earliest help in this regard will be highly appreciated. Thanks in advance.
> > > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > >
> > >
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Reply by Joe Radomski April 13, 20092009-04-13
usually before you source anything off an external xtal you should test that it is stable, then once the osc fault flags are clear then switch your source to that clock. in this case you can set up the aclk divider immediately but you should not proceed on enabling functions like the wd timer until you know the clock is stable by checking the fault flags..



--- On Mon, 4/13/09, ti2tt wrote:

From: ti2tt
Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
To: m...
Date: Monday, April 13, 2009, 3:20 AM

Hello,

I am using a 1MHz XTAL at LFXT1 and dividing by 1 to get ACLK = 1MHz as below,
BIC #OSCOFF,SR // Turn on osc.
BIS.B #XTS+DIVA_0, &BCSCTL1 // HF mode //ACLK Divide by 1

I have checked this on DSO by outputting to an i/o pin. Is anything incorrect in this configuration?

Thanks in advance.
--- In msp430@yahoogroups. com, Joe Radomski wrote:
>
> We need a few things cleared up.. You say you are using aclk at 1mhz, ACLK can only be sourced by LFXT1 (in LFMODE)or VLOCLK on the 2419.. Output aclk onto one of the pins and measure it with a scope..
>
> So how are you sourcing it with 1mhz??
>
> The max freq for lfmode (ext xtal) is 50khz.. the source to ACLK also has minimum pulse filter..
>
>
> --- On Sat, 4/11/09, ti2tt wrote:
>
> From: ti2tt
> Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> To: msp430@yahoogroups. com
> Date: Saturday, April 11, 2009, 6:55 AM
>
>
>
>
>
>
>
>
> Hi,
>
> As you all have seen that the #defines are correct in the code but still my question remains unanswered. I am handling the watchdog correctly but at the same time after periodic refresh, I am getting watchdog reset. Can anyone clarify this?
>
> Whether the use of ACLK for watchdog clock source in my code which is 1MHz/32768 is acceptable or not as the MCLK in my case is 250 KHz? Can anyone clarify this also?
>
> I badly need you people help for this. Thanks in advance.
> --- In msp430@yahoogroups. com, Joe Radomski wrote:
> >
> > You are correct.. I looked atthe crossworks header file and it does indeed include the password... so it wount reset, but my other point is valid.. I'm not sure what header I looked at initially that didn't have the password... I usually explicitly show the bits when I do configurations, I don't make it a habit of using defines like that so that it forces be to make sure I handle things correctly, unless I have to make the code compile for several devices then these definitions work out better (for example alkso having to have the code work on a 5xx series which has an extra bit in the divider) and don't have to add in as many conditional compiles...
> >
> > the stopping of the WDT timer in his first line is unnecessary as crossworks does it in startup.asm by default.
> >
> >
> >
> > --- On Fri, 4/10/09, old_cow_yellow wrote:
> >
> > From: old_cow_yellow
> > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > To: msp430@yahoogroups. com
> > Date: Friday, April 10, 2009, 8:04 PM
> >
> >
> >
> >
> >
> >
> >
> >
> > Not really. It depends on what are defined as what.
> >
> > Many of the header files I have seen has effectively:
> > #define WDTCTL 0x0120
> > #define WDT_ARST_1000 0x5A0C
> >
> > Using such a header file, the statement:
> > WDTCTL = WDT_ARST_1000;
> > will not issue a Watchdog Password Violation reset
> >
> > On the other hand, if WDTCTL is defined to be something other than 0x0120, the same statement may have nothing to do with the Watchdog.
> >
> > What it appears to be saying is not necessarily what you get. That is the unspecified #define can do for you. And that is why I asked would val=THREE resulted in val being set to 3.
> >
> > --- In msp430@yahoogroups. com, Joe Radomski wrote:
> > >
> > > you are correct.. the way hisexample is currently setting the register will issue an immediate reset.. since no password is provided, but if he does get it set correcty the timeout period is very small and will probably reset anyway..
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > --- On Fri, 4/10/09, citymouse2u wrote:
> > >
> > > From: citymouse2u
> > > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > > To: msp430@yahoogroups. com
> > > Date: Friday, April 10, 2009, 1:24 PM
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > I think you need to use:
> > > WDTCTL = WDTPW + WDT_ARST_1000;
> > > Changing the WD without the password will cause a watchdog reset.
> > >
> > > --- In msp430@yahoogroups. com, "ti2tt" wrote:
> > > >
> > > > Hello Forum members,
> > > >
> > > > I am using MSP430F2418 with CrossStudio. I want to use internal watchdog of this controller. I have configured the watchdog as
> > > >
> > > > WDTCTL = WDTPW + WDTHOLD;
> > > > WDTCTL = WDT_ARST_1000;
> > > >
> > > > The refresh routine for watchdog counter consists as:
> > > >
> > > > WDTCTL = WDTPW + WDTCNTCL;
> > > >
> > > > With this configuration, I am getting a watchdog reset after certain intervals. Here I am using a XTAL of 1MHz connected to XT1 pin. I have configured MCLK=250KHz and ACLK=1MHz. I am using ACLK as source for watchdog counter.
> > > > What is the reason for watchdog getting resetted? Is any other initialisation/ handling is required for the watchdog?
> > > >
> > > >
> > > > The datasheet for MSP430F2418 says that "The WDT+ counter clock should be slower or equal than the system (MCLK) frequency". Does this mean that my clock source selection will not work for watchdog? What combination I can use for watchdog clock source? Has anyone faced any issue other than this with the internal watchdog of MSP430?
> > > >
> > > > Your earliest help in this regard will be highly appreciated. Thanks in advance.
> > > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
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Reply by ti2tt April 13, 20092009-04-13
Hello,

Below is the code I am using for watchdog,

#define WDT_ARST_1000 (WDTPW+WDTCNTCL+WDTSSEL)

void WatchdogHalt (void)
{
WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer
}

void EnableWatchdog (void)
{
WDTCTL = WDT_ARST_1000;
}

void ResetWatchdog (void)
{
WDTCTL = WDTPW + WDTCNTCL; //Refresh watchdog counter
}

void main (void)
{
WatchdogHalt(); //Halt internal WDOG
_SelectCrystalOsc(); //Configure XTAL
EnableWatchdog(); //Enable internal WDOG
ResetWatchdog(); //Reset internal WDOG
while(1)
{
ResetWatchdog(); //Reset internal WDOG
}
}

The bits related to watchdog sfrs are defined in msp430F24x.h file. Please guide me.

Thanks in advance.
--- In m..., "old_cow_yellow" wrote:
>
> In your original posting, you said"
>
> "The refresh routine for watchdog counter consists as:
> " WDTCTL = WDTPW + WDTCNTCL;"
>
> And you also said:
>
> "I am using ACLK as source for watchdog counter."
>
> I am not sure about that. I can only assume that the #define(s) you used make "ACLK as source for watchdog counter".
>
> --OCY
>
> --- In m..., "ti2tt" wrote:
> >
> > Hi,
> >
> > As you all have seen that the #defines are correct in the code but still my question remains unanswered. I am handling the watchdog correctly but at the same time after periodic refresh, I am getting watchdog reset. Can anyone clarify this?
> >
> > Whether the use of ACLK for watchdog clock source in my code which is 1MHz/32768 is acceptable or not as the MCLK in my case is 250 KHz? Can anyone clarify this also?
> >
> > I badly need you people help for this. Thanks in advance.
> > --- In m..., Joe Radomski wrote:
> > >
> > > You are correct.. I looked atthe crossworks header file and it does indeed include the password... so it wount reset, but my other point is valid.. I'm not sure what header I looked at initially that didn't� have the password... I usually explicitly show the bits when I do configurations, I don't make it a habit of using defines like that so that it forces be to make sure I handle things correctly, unless I have to make the code compile for several devices then these definitions work out better (for example alkso having to have the code work on a 5xx series which has an extra bit in the divider) and don't have to add in as many conditional compiles...
> > > �
> > > the stopping of the WDT timer in his first line is unnecessary as crossworks does it in startup.asm by default.
> > > �
> > >
> > >
> > > --- On Fri, 4/10/09, old_cow_yellow wrote:
> > >
> > > From: old_cow_yellow
> > > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > > To: m...
> > > Date: Friday, April 10, 2009, 8:04 PM
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > Not really. It depends on what are defined as what.
> > >
> > > Many of the header files I have seen has effectively:
> > > #define WDTCTL 0x0120
> > > #define WDT_ARST_1000 0x5A0C
> > >
> > > Using such a header file, the statement:
> > > WDTCTL = WDT_ARST_1000;
> > > will not issue a Watchdog Password Violation reset
> > >
> > > On the other hand, if WDTCTL is defined to be something other than 0x0120, the same statement may have nothing to do with the Watchdog.
> > >
> > > What it appears to be saying is not necessarily what you get. That is the unspecified #define can do for you. And that is why I asked would val=THREE resulted in val being set to 3.
> > >
> > > --- In msp430@yahoogroups. com, Joe Radomski wrote:
> > > >
> > > > you are correct.. the way hisexample �is currently setting the register will issue an immediate reset.. since no password is provided, but if he does get it set correcty the timeout period is very small and will probably reset anyway..
> > > > �
> > > > �
> > > > �
> > > > �
> > > > �
> > > >
> > > >
> > > > --- On Fri, 4/10/09, citymouse2u wrote:
> > > >
> > > > From: citymouse2u
> > > > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > > > To: msp430@yahoogroups. com
> > > > Date: Friday, April 10, 2009, 1:24 PM
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > > I think you need to use:
> > > > WDTCTL = WDTPW + WDT_ARST_1000;
> > > > Changing the WD without the password will cause a watchdog reset.
> > > >
> > > > --- In msp430@yahoogroups. com, "ti2tt" wrote:
> > > > >
> > > > > Hello Forum members,
> > > > >
> > > > > I am using MSP430F2418 with CrossStudio. I want to use internal watchdog of this controller. I have configured the watchdog as
> > > > >
> > > > > WDTCTL = WDTPW + WDTHOLD;
> > > > > WDTCTL = WDT_ARST_1000;
> > > > >
> > > > > The refresh routine for watchdog counter consists as:
> > > > >
> > > > > WDTCTL = WDTPW + WDTCNTCL;
> > > > >
> > > > > With this configuration, I am getting a watchdog reset after certain intervals. Here I am using a XTAL of 1MHz connected to XT1 pin. I have configured MCLK=250KHz and ACLK=1MHz. I am using ACLK as source for watchdog counter.
> > > > > What is the reason for watchdog getting resetted? Is any other initialisation/ handling is required for the watchdog?
> > > > >
> > > > >
> > > > > The datasheet for MSP430F2418 says that "The WDT+ counter clock should be slower or equal than the system (MCLK) frequency". Does this mean that my clock source selection will not work for watchdog? What combination I can use for watchdog clock source? Has anyone faced any issue other than this with the internal watchdog of MSP430?
> > > > >
> > > > > Your earliest help in this regard will be highly appreciated. Thanks in advance.
> > > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
>

Reply by ti2tt April 13, 20092009-04-13
Hello,

I am using a 1MHz XTAL at LFXT1 and dividing by 1 to get ACLK = 1MHz as below,
BIC #OSCOFF,SR // Turn on osc.
BIS.B #XTS+DIVA_0,&BCSCTL1 // HF mode //ACLK Divide by 1

I have checked this on DSO by outputting to an i/o pin. Is anything incorrect in this configuration?

Thanks in advance.
--- In m..., Joe Radomski wrote:
>
> We need a few things cleared up.. You say you are using aclk at 1mhz, ACLK can only be sourced by LFXT1 (in LFMODE)or VLOCLK on the 2419.. Output aclk onto one of the pins and measure it with a scope..
>
> So how are you sourcing it with 1mhz??
>
> The max freq for lfmode (ext xtal) is 50khz.. the source to ACLK also has minimum pulse filter..
>
>
> --- On Sat, 4/11/09, ti2tt wrote:
>
> From: ti2tt
> Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> To: m...
> Date: Saturday, April 11, 2009, 6:55 AM
>
>
>
>
>
>
>
>
> Hi,
>
> As you all have seen that the #defines are correct in the code but still my question remains unanswered. I am handling the watchdog correctly but at the same time after periodic refresh, I am getting watchdog reset. Can anyone clarify this?
>
> Whether the use of ACLK for watchdog clock source in my code which is 1MHz/32768 is acceptable or not as the MCLK in my case is 250 KHz? Can anyone clarify this also?
>
> I badly need you people help for this. Thanks in advance.
> --- In msp430@yahoogroups. com, Joe Radomski wrote:
> >
> > You are correct.. I looked atthe crossworks header file and it does indeed include the password... so it wount reset, but my other point is valid.. I'm not sure what header I looked at initially that didn't have the password... I usually explicitly show the bits when I do configurations, I don't make it a habit of using defines like that so that it forces be to make sure I handle things correctly, unless I have to make the code compile for several devices then these definitions work out better (for example alkso having to have the code work on a 5xx series which has an extra bit in the divider) and don't have to add in as many conditional compiles...
> >
> > the stopping of the WDT timer in his first line is unnecessary as crossworks does it in startup.asm by default.
> >
> >
> >
> > --- On Fri, 4/10/09, old_cow_yellow wrote:
> >
> > From: old_cow_yellow
> > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > To: msp430@yahoogroups. com
> > Date: Friday, April 10, 2009, 8:04 PM
> >
> >
> >
> >
> >
> >
> >
> >
> > Not really. It depends on what are defined as what.
> >
> > Many of the header files I have seen has effectively:
> > #define WDTCTL 0x0120
> > #define WDT_ARST_1000 0x5A0C
> >
> > Using such a header file, the statement:
> > WDTCTL = WDT_ARST_1000;
> > will not issue a Watchdog Password Violation reset
> >
> > On the other hand, if WDTCTL is defined to be something other than 0x0120, the same statement may have nothing to do with the Watchdog.
> >
> > What it appears to be saying is not necessarily what you get. That is the unspecified #define can do for you. And that is why I asked would val=THREE resulted in val being set to 3.
> >
> > --- In msp430@yahoogroups. com, Joe Radomski wrote:
> > >
> > > you are correct.. the way hisexample is currently setting the register will issue an immediate reset.. since no password is provided, but if he does get it set correcty the timeout period is very small and will probably reset anyway..
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > --- On Fri, 4/10/09, citymouse2u wrote:
> > >
> > > From: citymouse2u
> > > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > > To: msp430@yahoogroups. com
> > > Date: Friday, April 10, 2009, 1:24 PM
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > I think you need to use:
> > > WDTCTL = WDTPW + WDT_ARST_1000;
> > > Changing the WD without the password will cause a watchdog reset.
> > >
> > > --- In msp430@yahoogroups. com, "ti2tt" wrote:
> > > >
> > > > Hello Forum members,
> > > >
> > > > I am using MSP430F2418 with CrossStudio. I want to use internal watchdog of this controller. I have configured the watchdog as
> > > >
> > > > WDTCTL = WDTPW + WDTHOLD;
> > > > WDTCTL = WDT_ARST_1000;
> > > >
> > > > The refresh routine for watchdog counter consists as:
> > > >
> > > > WDTCTL = WDTPW + WDTCNTCL;
> > > >
> > > > With this configuration, I am getting a watchdog reset after certain intervals. Here I am using a XTAL of 1MHz connected to XT1 pin. I have configured MCLK=250KHz and ACLK=1MHz. I am using ACLK as source for watchdog counter.
> > > > What is the reason for watchdog getting resetted? Is any other initialisation/ handling is required for the watchdog?
> > > >
> > > >
> > > > The datasheet for MSP430F2418 says that "The WDT+ counter clock should be slower or equal than the system (MCLK) frequency". Does this mean that my clock source selection will not work for watchdog? What combination I can use for watchdog clock source? Has anyone faced any issue other than this with the internal watchdog of MSP430?
> > > >
> > > > Your earliest help in this regard will be highly appreciated. Thanks in advance.
> > > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
> >
>
>
>
>
>
>
>
>
>
>
>
>
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>

Reply by old_cow_yellow April 11, 20092009-04-11
In your original posting, you said"

"The refresh routine for watchdog counter consists as:
" WDTCTL = WDTPW + WDTCNTCL;"

And you also said:

"I am using ACLK as source for watchdog counter."

I am not sure about that. I can only assume that the #define(s) you used make "ACLK as source for watchdog counter".

--OCY

--- In m..., "ti2tt" wrote:
>
> Hi,
>
> As you all have seen that the #defines are correct in the code but still my question remains unanswered. I am handling the watchdog correctly but at the same time after periodic refresh, I am getting watchdog reset. Can anyone clarify this?
>
> Whether the use of ACLK for watchdog clock source in my code which is 1MHz/32768 is acceptable or not as the MCLK in my case is 250 KHz? Can anyone clarify this also?
>
> I badly need you people help for this. Thanks in advance.
> --- In m..., Joe Radomski wrote:
> >
> > You are correct.. I looked atthe crossworks header file and it does indeed include the password... so it wount reset, but my other point is valid.. I'm not sure what header I looked at initially that didn't� have the password... I usually explicitly show the bits when I do configurations, I don't make it a habit of using defines like that so that it forces be to make sure I handle things correctly, unless I have to make the code compile for several devices then these definitions work out better (for example alkso having to have the code work on a 5xx series which has an extra bit in the divider) and don't have to add in as many conditional compiles...
> > �
> > the stopping of the WDT timer in his first line is unnecessary as crossworks does it in startup.asm by default.
> > �
> >
> >
> > --- On Fri, 4/10/09, old_cow_yellow wrote:
> >
> > From: old_cow_yellow
> > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > To: m...
> > Date: Friday, April 10, 2009, 8:04 PM
> >
> >
> >
> >
> >
> >
> >
> >
> > Not really. It depends on what are defined as what.
> >
> > Many of the header files I have seen has effectively:
> > #define WDTCTL 0x0120
> > #define WDT_ARST_1000 0x5A0C
> >
> > Using such a header file, the statement:
> > WDTCTL = WDT_ARST_1000;
> > will not issue a Watchdog Password Violation reset
> >
> > On the other hand, if WDTCTL is defined to be something other than 0x0120, the same statement may have nothing to do with the Watchdog.
> >
> > What it appears to be saying is not necessarily what you get. That is the unspecified #define can do for you. And that is why I asked would val=THREE resulted in val being set to 3.
> >
> > --- In msp430@yahoogroups. com, Joe Radomski wrote:
> > >
> > > you are correct.. the way hisexample �is currently setting the register will issue an immediate reset.. since no password is provided, but if he does get it set correcty the timeout period is very small and will probably reset anyway..
> > > �
> > > �
> > > �
> > > �
> > > �
> > >
> > >
> > > --- On Fri, 4/10/09, citymouse2u wrote:
> > >
> > > From: citymouse2u
> > > Subject: [msp430] Re: Use of internal WATCHDOG for MSP430F2418
> > > To: msp430@yahoogroups. com
> > > Date: Friday, April 10, 2009, 1:24 PM
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > > I think you need to use:
> > > WDTCTL = WDTPW + WDT_ARST_1000;
> > > Changing the WD without the password will cause a watchdog reset.
> > >
> > > --- In msp430@yahoogroups. com, "ti2tt" wrote:
> > > >
> > > > Hello Forum members,
> > > >
> > > > I am using MSP430F2418 with CrossStudio. I want to use internal watchdog of this controller. I have configured the watchdog as
> > > >
> > > > WDTCTL = WDTPW + WDTHOLD;
> > > > WDTCTL = WDT_ARST_1000;
> > > >
> > > > The refresh routine for watchdog counter consists as:
> > > >
> > > > WDTCTL = WDTPW + WDTCNTCL;
> > > >
> > > > With this configuration, I am getting a watchdog reset after certain intervals. Here I am using a XTAL of 1MHz connected to XT1 pin. I have configured MCLK=250KHz and ACLK=1MHz. I am using ACLK as source for watchdog counter.
> > > > What is the reason for watchdog getting resetted? Is any other initialisation/ handling is required for the watchdog?
> > > >
> > > >
> > > > The datasheet for MSP430F2418 says that "The WDT+ counter clock should be slower or equal than the system (MCLK) frequency". Does this mean that my clock source selection will not work for watchdog? What combination I can use for watchdog clock source? Has anyone faced any issue other than this with the internal watchdog of MSP430?
> > > >
> > > > Your earliest help in this regard will be highly appreciated. Thanks in advance.
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