Reply by Michael J Scott●October 9, 20092009-10-09
Rolf,
I remember reading in NXP literature someplace that the EMC buffering was
actually buffering (latching) of the data and address lines. That is why I
turned it on, but in re-reading the reference manual it is clear what the
buffering is meant to do. I must have missed it in the first few passes
through the manual. As best as I can tell my silicon is rev C (initial
release)
As for the SCS register, NXP tech support tells me that with this bit set
the EMC will always load 4 32bit words. Sounds like some sort of
mini-buffer.
Thanks for you EMC help.
Mike
_____
From: rolf_meeser [mailto:r...@yahoo.de]
Sent: Friday, October 09, 2009 12:49 PM
To: l...
Subject: [lpc2000] Re: EMC & Flash
Hi Mike,
Buffering takes place inside the EMC. It can be controlled for each static
chip select individually in EMCStaticConfigX bit 19.
When you program the external flash, clear this bit to get full control over
the read cycles. You may then run the typical algorithm (DQ5 toggling, ...)
to detect the end of a program cycle.
When you go back to normal operation, set bit 19 to benefit from the
buffers.
SCS bit 2 should be set if available (starting with revision D of the
LPC2468). There's a good chance your silicon is still rev B (last line
of
marking).
This bit doesn't have an influence on the buffering effect which you
have
described though!
Rolf
--- In lpc2000@yahoogroups .com, "Michael
J Scott" wrote: >
> Just got a reply from NXP tech support there is a EMC burst mode that is
> default turned on, it is controlled in the SCS register bit 2.
>
> Mike
>
> _____
>
> From: redwire85 [mailto:redwire85@...]
> Sent: Friday, October 09, 2009 11:08 AM
> To: lpc2000@yahoogroups .com
> Subject: [lpc2000] Re: EMC & Flash
>
> --- In lpc2000@yahoogroups .com, "Michael > J Scott" wrote:
> >
> > Thanks all. Changed the chip and everything is working correctly. The EMC > > read buffer is going to be an issue for checking
status while programming > or
> > erasing, I have a plan though.
> >
> Hmmm... you seem to imply that read buffering occurs inherently in the
> LPC2468 chip. I don't see any read buffering on the CSx memory regions
on my > board as I have page mode turned off.
>
> Are you sure it's buffering or is there a "volatile" issue in the code?
Or
> am I missing the obvious?
>
>
>
--- In l..., "Michael J Scott" wrote: >
> I suspect that the EMC
> reads ahead to fill a 256 byte buffer.
> There is no 256 byte buffer in the chip. The LPC can store 16 WORDs.
I suspect your IDE is fetching excess memory to fill a display window for
memory...
I do NOT see the effect you are describing at all with a LPC2468. By default I
have page mode OFF which you state you have as well.
My suspicion is the rest of the world would be fighting this if it were a true
problem. :)
Reply by rolf_meeser●October 9, 20092009-10-09
Hi Mike,
Buffering takes place inside the EMC. It can be controlled for each static chip
select individually in EMCStaticConfigX bit 19.
When you program the external flash, clear this bit to get full control over the
read cycles. You may then run the typical algorithm (DQ5 toggling, ...) to
detect the end of a program cycle.
When you go back to normal operation, set bit 19 to benefit from the buffers.
SCS bit 2 should be set if available (starting with revision D of the LPC2468).
There's a good chance your silicon is still rev B (last line of
marking).
This bit doesn't have an influence on the buffering effect which you have
described though!
Rolf
--- In l..., "Michael J Scott" wrote: >
> Just got a reply from NXP tech support there is a EMC burst mode that is
> default turned on, it is controlled in the SCS register bit 2.
>
>
>
> Mike
>
>
>
> _____
>
> From: redwire85 [mailto:redwire85@...]
> Sent: Friday, October 09, 2009 11:08 AM
> To: l...
> Subject: [lpc2000] Re: EMC & Flash
>
>
>
>
>
> --- In lpc2000@yahoogroups .com,
"Michael
> J Scott" wrote:
> >
> > Thanks all. Changed the chip and everything is working correctly. The EMC
> > read buffer is going to be an issue for checking status while programming
> or
> > erasing, I have a plan though.
> >
> Hmmm... you seem to imply that read buffering occurs inherently in the
> LPC2468 chip. I don't see any read buffering on the CSx memory regions on
my
> board as I have page mode turned off.
>
> Are you sure it's buffering or is there a "volatile" issue in the code?
Or
> am I missing the obvious?
>
>
>
Reply by Michael J Scott●October 9, 20092009-10-09
Just got a reply from NXP tech support there is a EMC burst mode that is
default turned on, it is controlled in the SCS register bit 2.
Mike
_____
From: redwire85 [mailto:r...@yahoo.com]
Sent: Friday, October 09, 2009 11:08 AM
To: l...
Subject: [lpc2000] Re: EMC & Flash
--- In lpc2000@yahoogroups .com, "Michael
J Scott" wrote: >
> Thanks all. Changed the chip and everything is working correctly. The EMC
> read buffer is going to be an issue for checking status while programming or > erasing, I have a plan though.
> Hmmm... you seem to imply that read buffering occurs inherently in the
LPC2468 chip. I don't see any read buffering on the CSx memory regions on
my
board as I have page mode turned off.
Are you sure it's buffering or is there a "volatile" issue in the code?
Or
am I missing the obvious?
Reply by Michael J Scott●October 9, 20092009-10-09
Read buffering is occurring within the EMC. I found it by setting up a read
/ write loop to three locations while I was debugging my flash problem. The
chip had three writes but no reads. So I kept looking. Finally I set up a
read loop, remember that I'm working with a flash that is 16 bits, when
the
loop count was set to 1 - 128 no reads at the chip, when the loop was set to
129 then reads at the chip. My page mode was turned off as well. The code
was set to volatile and I walked through the disassembly at first to make
sure that the code was being executed correctly. I suspect that the EMC
reads ahead to fill a 256 byte buffer.
I also tested the theory using my IDE, CrossWorks, in a memory window I read
the first 128 bytes of flash, then I changed the some of the locations from
0xffff to 0 and the 0 stayed even after repeated reads (it is a flash so it
really did not change). If I made the read 258 bytes and change a location
from 0xffff to 0 and did a re-read it did not change. Seems clear to me.
Mike
_____
From: redwire85 [mailto:r...@yahoo.com]
Sent: Friday, October 09, 2009 11:08 AM
To: l...
Subject: [lpc2000] Re: EMC & Flash
--- In lpc2000@yahoogroups .com, "Michael
J Scott" wrote: >
> Thanks all. Changed the chip and everything is working correctly. The EMC
> read buffer is going to be an issue for checking status while programming or > erasing, I have a plan though.
> Hmmm... you seem to imply that read buffering occurs inherently in the
LPC2468 chip. I don't see any read buffering on the CSx memory regions on
my
board as I have page mode turned off.
Are you sure it's buffering or is there a "volatile" issue in the code?
Or
am I missing the obvious?
Reply by redwire85●October 9, 20092009-10-09
--- In l..., "Michael J Scott" wrote: >
> Thanks all. Changed the chip and everything is working correctly. The EMC
> read buffer is going to be an issue for checking status while programming
or
> erasing, I have a plan though.
> Hmmm... you seem to imply that read buffering occurs inherently in the
LPC2468 chip. I don't see any read buffering on the CSx memory regions on
my board as I have page mode turned off.
Are you sure it's buffering or is there a "volatile" issue in the code? Or
am I missing the obvious?
Reply by Michael J Scott●October 9, 20092009-10-09
I'm not familiar with the specifics of your flash chip. Most chips have
a
lot in common, but also have a lot of differences. I have been chip erasing
then programming only a single location at a time using a fixed delay. The
read buffer in the EMC makes it difficult (or in some cases impossible) to
do either a data poll or toggle bit flash status checking.
Mike
_____
From: Alberto de Martini [mailto:a...@gmail.com]
Sent: Thursday, October 08, 2009 5:37 PM
To: l...
Subject: Re: [lpc2000] Re: EMC & Flash
I am having some problems to write in the flash memory, here is my code
void WriteFlash (void)
{
unsigned short i, Vetor2 [32]
{3030,3131,3232,3333,2424,3535,3636,3737,3838,3939,4040,
when I try to read the same block I get nothing, remenber that I can read
the Flash ID, so my read routine is working well.
2009/10/8, Michael J Scott
com>: >
> Thanks all. Changed the chip and everything is working correctly. The EMC
> read buffer is going to be an issue for checking status while programming
> or
> erasing, I have a plan though.
>
> Thanks again.
>
> Mike
>
> _____
>
> From: Alberto de Martini [mailto:albertomartini@
gmail.com] >
> Sent: Thursday, October 08, 2009 1:45 PM
> To: lpc2000@yahoogroups .com
> Subject: Re: [lpc2000] Re: EMC & Flash
>
> Hi,
>
> Now I am able to read the product ID from external flash memory, I am using > the CS1 and a spansion GL256P, A1...A23. Try to
execute the code like that? >
> extern Int32U NVRAM_BASE_ADDR;
> #define FLASH_NVRAM_BASE_ADDR ((Int32U)&NVRAM_BASE_ADDR)
>
> EMCSTATICCNFG1 = 0x0081 | (1 << 19);
> EMCSTATICWAITWEN1 = 2;
> EMCSTATICWAITOEN1 = 0;
> EMCSTATICWAITRD1 = 0x1f;
> EMCSTATICWAITPG1 = 0;
> EMCSTATICWAITWR1 = 0x1f;
> EMCSTATICWAITTURN1 = 0x0f;
>
> void LerFlash (void)
> {
> unsigned short i, id1, id2, id3, id4, id5, id6;
>
> *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x555) << 1))) >
0x00aa;
> *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x2aa) << 1))) >
0x0055;
> *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x555) << 1))) >
0x0090;
>
> id1 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0000) <<
> 1)));
> id2 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0001) <<
> 1)));
> id3 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x000e) <<
> 1)));
> id4 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x000f) <<
> 1)));
> id5 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0003) <<
> 1)));
> id6 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0002) <<
> 1)));
> }
>
> 2009/10/8, Michael J Scott
> >
> com>:
> >
> >
> >
> > FYI, The EMC appears to have a 256 byte read buffer. So if you were
> > repeatable reading from the same location (or any location which is not
> > more
> > than 256 bytes away), the EMC reads from the internal buffer and does not > > actually read from the memory (at least on the
static side) .That might
> be
> > a
> > problem for someone who wants to put something other than memory on the
> > EMC.
> >
> > _____
> >
> > From: rolf_meeser [mailto:rolfm_9dq@yahoo.
> >
> de ]
> > Sent: Thursday, October 08, 2009 11:29 AM
> > To: lpc2000@yahoogroups > > .com
>
> > Subject: [lpc2000] Re: EMC & Flash
> >
> > Hi Mike,
> >
> > The narrow WE pulses are the refresh cycles of you SDRAM. During write
> > attempts to the flash WE should have been completely inactive.
> > So it's working now for you?
> >
> > Regarding the manual, it does indeed have room for improvement...
> >
> > Rolf
> >
> > --- In lpc2000@yahoogroups
>
> 2540yahoogroups.com>>
> > .com, "Michael
> > J Scott" wrote:
> > >
> > > Rolf,
> > >
> > >
> > >
> > > Thanks. The PB bit seemed to point to chips with individual byte
> controls
> > > (upper and lower) which my flash does not have. Interestingly the WE
> did
> > > have a pulse on it without the PB bit being set; it was narrow but
> > > definitely there. Setting the PB bit does make it more pronounced. Did
> > NXP
> > > publish any detailed information about the EMC, I find the explanations > > for
> > > the different control registers very thin.
> > >
> > >
> > >
> > > Mike
> > >
> > >
> > >
> > > _____
> > >
> > > From: rolf_meeser [mailto:rolfm_9dq@...]
> > > Sent: Thursday, October 08, 2009 9:12 AM
> > > To: lpc2000@yahoogroups
>
> 2540yahoogroups.com>>
> > .com
> > > Subject: [lpc2000] Re: EMC & Flash
> > >
> > >
> > >
> > >
> > >
> > > Hi Mike,
> > >
> > > --- In lpc2000@yahoogroups
>
> 2540yahoogroups.com>>
> > .com,
> > > mjscott@ wrote:
> > > > Static Init is:
> > > >
> > > > EMCStaticConfig0 = 0x1 | (1 << 19);
> > > > EMCStaticWaitRd0 = 1f;
> > > > EMCStaticWaitTurn0 = 0x0f;
> > > > EMCStaticWaitWen0 = 2;
> > > > EMCStaticWaitWr0 = 0x1f;
> > > >
> > >
> > > Try setting bit 7 (PB) in EMCStaticConfig0.
> > > With this bit currently being cleared, you're lacking the write
pulse
> at
> > the
> > > WE pin!
> > >
> > > Regards,
> > > Rolf
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> >
> >
> >
> >
> >
>
>
>
Reply by Alberto de Martini●October 8, 20092009-10-08
I am having some problems to write in the flash memory, here is my code
void WriteFlash (void)
{
unsigned short i, Vetor2 [32]
{3030,3131,3232,3333,2424,3535,3636,3737,3838,3939,4040,
when I try to read the same block I get nothing, remenber that I can read
the Flash ID, so my read routine is working well.
2009/10/8, Michael J Scott : >
> Thanks all. Changed the chip and everything is working correctly. The EMC
> read buffer is going to be an issue for checking status while programming
> or
> erasing, I have a plan though.
>
> Thanks again.
>
> Mike
>
> _____
>
> From: Alberto de Martini
[mailto:a...@gmail.com]
>
> Sent: Thursday, October 08, 2009 1:45 PM
> To: l...
> Subject: Re: [lpc2000] Re: EMC & Flash
>
> Hi,
>
> Now I am able to read the product ID from external flash memory, I am using
> the CS1 and a spansion GL256P, A1...A23. Try to execute the code like that?
>
> extern Int32U NVRAM_BASE_ADDR;
> #define FLASH_NVRAM_BASE_ADDR ((Int32U)&NVRAM_BASE_ADDR)
>
> EMCSTATICCNFG1 = 0x0081 | (1 << 19);
> EMCSTATICWAITWEN1 = 2;
> EMCSTATICWAITOEN1 = 0;
> EMCSTATICWAITRD1 = 0x1f;
> EMCSTATICWAITPG1 = 0;
> EMCSTATICWAITWR1 = 0x1f;
> EMCSTATICWAITTURN1 = 0x0f;
>
> void LerFlash (void)
> {
> unsigned short i, id1, id2, id3, id4, id5, id6;
>
> *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x555) << 1))) >
0x00aa;
> *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x2aa) << 1))) >
0x0055;
> *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x555) << 1))) >
0x0090;
>
> id1 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0000) <<
> 1)));
> id2 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0001) <<
> 1)));
> id3 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x000e) <<
> 1)));
> id4 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x000f) <<
> 1)));
> id5 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0003) <<
> 1)));
> id6 = *( (volatile UINT16 *)(FLASH_NVRAM_BASE_ADDR + (((UINT16)0x0002) <<
> 1)));
> }
>
> 2009/10/8, Michael J Scott
> >
> com>:
> >
> >
> >
> > FYI, The EMC appears to have a 256 byte read buffer. So if you were
> > repeatable reading from the same location (or any location which is not
> > more
> > than 256 bytes away), the EMC reads from the internal buffer and does not
> > actually read from the memory (at least on the static side) .That might
> be
> > a
> > problem for someone who wants to put something other than memory on the
> > EMC.
> >
> > _____
> >
> > From: rolf_meeser [mailto:rolfm_9dq@yahoo.
> >
> de ]
> > Sent: Thursday, October 08, 2009 11:29 AM
> > To: lpc2000@yahoogroups
>
> .com
>
> > Subject: [lpc2000] Re: EMC & Flash
> >
> > Hi Mike,
> >
> > The narrow WE pulses are the refresh cycles of you SDRAM. During write
> > attempts to the flash WE should have been completely inactive.
> > So it's working now for you?
> >
> > Regarding the manual, it does indeed have room for improvement...
> >
> > Rolf
> >
> > --- In lpc2000@yahoogroups
>
> 2540yahoogroups.com>>
> > .com, "Michael
> > J Scott" wrote:
> > >
> > > Rolf,
> > >
> > >
> > >
> > > Thanks. The PB bit seemed to point to chips with individual byte
> controls
> > > (upper and lower) which my flash does not have. Interestingly the WE
> did
> > > have a pulse on it without the PB bit being set; it was narrow but
> > > definitely there. Setting the PB bit does make it more pronounced. Did
> > NXP
> > > publish any detailed information about the EMC, I find the explanations
> > for
> > > the different control registers very thin.
> > >
> > >
> > >
> > > Mike
> > >
> > >
> > >
> > > _____
> > >
> > > From: rolf_meeser [mailto:rolfm_9dq@...]
> > > Sent: Thursday, October 08, 2009 9:12 AM
> > > To: lpc2000@yahoogroups
>
> 2540yahoogroups.com>>
> > .com
> > > Subject: [lpc2000] Re: EMC & Flash
> > >
> > >
> > >
> > >
> > >
> > > Hi Mike,
> > >
> > > --- In lpc2000@yahoogroups
>
> 2540yahoogroups.com>>
> > .com,
> > > mjscott@ wrote:
> > > > Static Init is:
> > > >
> > > > EMCStaticConfig0 = 0x1 | (1 << 19);
> > > > EMCStaticWaitRd0 = 1f;
> > > > EMCStaticWaitTurn0 = 0x0f;
> > > > EMCStaticWaitWen0 = 2;
> > > > EMCStaticWaitWr0 = 0x1f;
> > > >
> > >
> > > Try setting bit 7 (PB) in EMCStaticConfig0.
> > > With this bit currently being cleared, you're lacking the write
pulse
> at
> > the
> > > WE pin!
> > >
> > > Regards,
> > > Rolf
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> >
> >
> >
> >
> >
>
>
>
>
>
Reply by Michael J Scott●October 8, 20092009-10-08
Thanks all. Changed the chip and everything is working correctly. The EMC
read buffer is going to be an issue for checking status while programming or
erasing, I have a plan though.
Thanks again.
Mike
_____
From: Alberto de Martini [mailto:a...@gmail.com]
Sent: Thursday, October 08, 2009 1:45 PM
To: l...
Subject: Re: [lpc2000] Re: EMC & Flash
Hi,
Now I am able to read the product ID from external flash memory, I am using
the CS1 and a spansion GL256P, A1...A23. Try to execute the code like that?
2009/10/8, Michael J Scott
com>: >
> FYI, The EMC appears to have a 256 byte read buffer. So if you were
> repeatable reading from the same location (or any location which is not
> more
> than 256 bytes away), the EMC reads from the internal buffer and does not
> actually read from the memory (at least on the static side) .That might be
> a
> problem for someone who wants to put something other than memory on the
> EMC.
>
> _____
>
> From: rolf_meeser [mailto:rolfm_9dq@yahoo. de ] > Sent: Thursday, October 08, 2009 11:29 AM
> To: lpc2000@yahoogroups .com
> Subject: [lpc2000] Re: EMC & Flash
>
> Hi Mike,
>
> The narrow WE pulses are the refresh cycles of you SDRAM. During write
> attempts to the flash WE should have been completely inactive.
> So it's working now for you?
>
> Regarding the manual, it does indeed have room for improvement...
>
> Rolf
>
> --- In lpc2000@yahoogroups > > .com, "Michael
> J Scott" wrote:
> >
> > Rolf,
> >
> >
> >
> > Thanks. The PB bit seemed to point to chips with individual byte controls > > (upper and lower) which my flash does not have.
Interestingly the WE did
> > have a pulse on it without the PB bit being set; it was narrow but
> > definitely there. Setting the PB bit does make it more pronounced. Did
> NXP
> > publish any detailed information about the EMC, I find the explanations
> for
> > the different control registers very thin.
> >
> >
> >
> > Mike
> >
> >
> >
> > _____
> >
> > From: rolf_meeser [mailto:rolfm_9dq@...]
> > Sent: Thursday, October 08, 2009 9:12 AM
> > To: lpc2000@yahoogroups > > .com
> > Subject: [lpc2000] Re: EMC & Flash
> >
> >
> >
> >
> >
> > Hi Mike,
> >
> > --- In lpc2000@yahoogroups > > .com,
> > mjscott@ wrote:
> > > Static Init is:
> > >
> > > EMCStaticConfig0 = 0x1 | (1 << 19);
> > > EMCStaticWaitRd0 = 1f;
> > > EMCStaticWaitTurn0 = 0x0f;
> > > EMCStaticWaitWen0 = 2;
> > > EMCStaticWaitWr0 = 0x1f;
> > >
> >
> > Try setting bit 7 (PB) in EMCStaticConfig0.
> > With this bit currently being cleared, you're lacking the write pulse
at
> the
> > WE pin!
> >
> > Regards,
> > Rolf
> >
> >
> >
> >
> >
> >
> >
>
Reply by Alberto de Martini●October 8, 20092009-10-08
Hi,
Now I am able to read the product ID from external flash memory, I am using
the CS1 and a spansion GL256P, A1...A23. Try to execute the code like that?
2009/10/8, Michael J Scott : >
> FYI, The EMC appears to have a 256 byte read buffer. So if you were
> repeatable reading from the same location (or any location which is not
> more
> than 256 bytes away), the EMC reads from the internal buffer and does not
> actually read from the memory (at least on the static side) .That might be
> a
> problem for someone who wants to put something other than memory on the
> EMC.
>
> _____
>
> From: rolf_meeser [mailto:r...@yahoo.de ]
> Sent: Thursday, October 08, 2009 11:29 AM
> To: l...
> Subject: [lpc2000] Re: EMC & Flash
>
> Hi Mike,
>
> The narrow WE pulses are the refresh cycles of you SDRAM. During write
> attempts to the flash WE should have been completely inactive.
> So it's working now for you?
>
> Regarding the manual, it does indeed have room for improvement...
>
> Rolf
>
> --- In lpc2000@yahoogroups
>
> .com, "Michael
> J Scott" wrote:
> >
> > Rolf,
> >
> >
> >
> > Thanks. The PB bit seemed to point to chips with individual byte controls
> > (upper and lower) which my flash does not have. Interestingly the WE did
> > have a pulse on it without the PB bit being set; it was narrow but
> > definitely there. Setting the PB bit does make it more pronounced. Did
> NXP
> > publish any detailed information about the EMC, I find the explanations
> for
> > the different control registers very thin.
> >
> >
> >
> > Mike
> >
> >
> >
> > _____
> >
> > From: rolf_meeser [mailto:rolfm_9dq@...]
> > Sent: Thursday, October 08, 2009 9:12 AM
> > To: lpc2000@yahoogroups
>
> .com
> > Subject: [lpc2000] Re: EMC & Flash
> >
> >
> >
> >
> >
> > Hi Mike,
> >
> > --- In lpc2000@yahoogroups
>
> .com,
> > mjscott@ wrote:
> > > Static Init is:
> > >
> > > EMCStaticConfig0 = 0x1 | (1 << 19);
> > > EMCStaticWaitRd0 = 1f;
> > > EMCStaticWaitTurn0 = 0x0f;
> > > EMCStaticWaitWen0 = 2;
> > > EMCStaticWaitWr0 = 0x1f;
> > >
> >
> > Try setting bit 7 (PB) in EMCStaticConfig0.
> > With this bit currently being cleared, you're lacking the write pulse
at
> the
> > WE pin!
> >
> > Regards,
> > Rolf
> >
> >
> >
> >
> >
> >
> >
>
