>> The problem is that I can't select the XT2 as a clock source for the
>> MCLK.
>
>You're probably victim to a common MSP430 beginner mistake of failing
>check for and clearing the oscillator fault after the clock source
>change over.  TI has a simple sample program called fet140_hfxtal.c (or
>something like that) that shows you exactly what you need to do.  I
>think there's also an app note avalable on the topic.  You should be
>able to find it on the TI web site.
>
>BTW, there's a very active MSP430 user's group on Yahoo groups.
>
>JJS
>
>

thank you kindly for your help, you was right, I don't wait for the OFIFG
come to set.

This code set the MCLK and SMCLK at the source XT2 for HF the msp430.

FLL_CTL1 = (SELS +  SELM1) & (~XT2OFF);

  do{
      IFG1 &= ~OFIFG;                       // Clear OSCFault flag
      for (i = 0xFF; i > 0; i--);           // Time for flag to set
    }while ((IFG1 & OFIFG) != 0);          // OSCFault flag still set?


EOF

> The problem is that I can't select the XT2 as a clock source for the
> MCLK.

You're probably victim to a common MSP430 beginner mistake of failing
check for and clearing the oscillator fault after the clock source
change over.  TI has a simple sample program called fet140_hfxtal.c (or
something like that) that shows you exactly what you need to do.  I
think there's also an app note avalable on the topic.  You should be
able to find it on the TI web site.

BTW, there's a very active MSP430 user's group on Yahoo groups.

JJS

I'm working with the ms430-449STK2 olimex development kit that IAR
distributes with its software,

"XT2 = 8Mhz"
The problem is that I can't select the XT2 as a clock source for the
MCLK.
In fact I make this instruction:

FLL_CTL1 = (SELS + SELM1) & (~XT2OFF);

and the IAR IDE show me that the right bits are sets, as follows:
SELM1 = 1
SELM0 = 0
XT20FF= 0
SELS = 1
However the MCLK works like I had selected the DCOPLUS source.

Like an extra comment, something weird is that I can configure the XT2 as
a clock source for SMCLK.