Thank you for your comment. > I teach a class on microcontroller systems and during
one of the lab
> sessions the students measured the DC parameters of one of the IO pins
> of an LPC1343.
Didn't you by chance measure also the load characteristics of the pin set
to input with pullup? The LPC13xx datasheet appears to have the same graph in
this regard than the LPC17xx datasheet, but according to our measurements the
real voltages are around 1V lower.
> We were able to verify all of the parameters except
the
> hysteresis voltage, which was typically about half of the data sheet
> value. We measured VIH and VIL both with and without hysteresis enabled and
there is definitely some additional hysteresis, just not as much as
> we expected.
I have not seen even the 0.2V hysteresis, which would be half of the datasheet
value (which is specified as "min"). Although the LPC17xx, contrary to the
LPC13xx, can't have the hysteresis switched off, I wonder whether there
couldn't be an undocumented register controlling the hysteresis, set to
"off" by default after reset; or is this simply just a design error. > I tried to find a specification for the test method
that NXP used for
> this parameter but I was unsuccessful. I too would like to hear NXP to comment in a professional way on these
findings. I was never very confident in these hastily concocted new chips, but
after issues like these surface, I become increasingly more hesitant to
recommend and use them for our new designs. I'd hate to come across some
show-stopping error after having spent considerable time with development;
mysterious intermittents due to chips not working as promised in the (also not
very carefully prepared) datasheets would be even more detrimental.
Jan Waclawek
--- In l..., "kjoehass" wrote: > --- In l..., Jan Waclawek konfera@ wrote:
> > However, the datasheet claims a hysteresis of Vhys(min)=0.4V, which
> > I don't see to happen (I tried two pins on the LPC1768, P0.25 and
> > P1.22).
>
> I teach a class on microcontroller systems and during one of the lab
> sessions the students measured the DC parameters of one of the IO pins
> of an LPC1343. We were able to verify all of the parameters except the
> hysteresis voltage, which was typically about half of the data sheet
> value. We measured VIH and VIL both with and without hysteresis enabled and there is definitely some additional hysteresis, just not
as
much as > we expected.
>
> I tried to find a specification for the test method that NXP used for
> this parameter but I was unsuccessful.
>
> Joe
> This is definitely puzzling as are the voltages we measured.
NXP, if you are monitoring, could you try to explain these anomalies to
us?
Larry
Reply by kjoehass●April 15, 20112011-04-15
--- In l..., Jan Waclawek wrote: > However, the datasheet claims a hysteresis of
Vhys(min)=0.4V, which
> I don't see to happen (I tried two pins on the LPC1768, P0.25 and
> P1.22).
I teach a class on microcontroller systems and during one of the lab
sessions the students measured the DC parameters of one of the IO pins
of an LPC1343. We were able to verify all of the parameters except the
hysteresis voltage, which was typically about half of the data sheet
value. We measured VIH and VIL both with and without hysteresis enabled and
there is definitely some additional hysteresis, just not as much as
we expected.
I tried to find a specification for the test method that NXP used for
this parameter but I was unsuccessful.
Joe
Reply by Jan Waclawek●April 14, 20112011-04-14
While at it, I experimented further with inputs. I placed a 1k/1k divider from
VDD to an input (set to hi-Z, no pullup/pulldown) and a 10k potentiometer in
parallel to ground, plus a 0.5uF ceramic capacitor as a filter. The input was
seen as logic 0 below 1.45V, as 1 above 1.51V and changing in between (this is a
devboard so surely there is a couple of tens of mV noise around).
However, the datasheet claims a hysteresis of Vhys(min)=0.4V, which I don't
see to happen (I tried two pins on the LPC1768, P0.25 and P1.22).
Can anybody please try a similar experiment and confirm or reject my
findings?
Thanks,
Jan Waclawek
Reply by Jan Waclawek●April 14, 20112011-04-14
I have made a measurement on a completely unloaded pin of the LPC1768 specimen I
have here and posted the results in
http://f1.grp.yahoofs.com/v1/gKmmTdhR5uPJKTGBBFAFdX2qlt1UlTPCZttVLzwvgvaBJ01NrhafHXKDbzyY0RnCvvJOIopkyud4zKogs5-4CAuCxG_83g/LPC17XX/LPC%20pullup%20measurement.pdf
. The load was a 200kOhm potentiometer in series with a fixed 10kOhm resistor
used as current sense. I see little reason not to extrapolate the graph at the
low current portion, which would give me around 2.2V at 0uA (I actually measured
2.283V on an otherwise unloaded pin). I used a commonplace DMM, so there may be
a couple of mV of absolute error and the input impedance might have been a
couple of MOhms (adding a fraction of uA current).
The most disturbing fact is, that the pullup does not seem to have any overhead
in ensuring a valid log 1 input, as it barely reaches the specified VINH(min) =
0.7*VDD.
Jan Waclawek
> I just heard back from NXP directly on this issue.
> According to NXP, the internal pull-up is provided by a FET configured as a
current source.
> As a result, the maximum pull-up voltage will be around 0.7V less than Vdd_IO.
> The GPIO are designed this way to provide 5V tolerance.
Ah, and is this a different NXP than the one I have the datasheet from? Surely
they know the difference between 0.7V and 0.3V, however "typical" the figure in
question is.
Morever, I tried to subtract 0.7V from 3.3V and I somehow can't get 2.3V
(from the post the link leads to) nor 2.1V measured by Larry (who's right
in that even a crappy DMM wouldn't sink currents in the order of 10uA).
I don't think this issue can be simply passed on with a couple of
handwaves.
Could somebody from NXP listening here please explain these discrepancies in a
binding way?
I measured the input pins with a multimeter and no loads on the pins. I
agree that it doesn't explain the extra 1V drop, but that is what the
inputs are after a reset. The output pin I measured was also driving an
led so was a little lower in voltage than an unloaded output.
Larry
--- In l..., Jan Waclawek wrote: >
> The datasheet in Fig.12 indicates a 0.3V drop from the 3.3V supply for the pullup. It still does not explain the extra 1V drop, unless you
load
the pin "excessively" (read: 10s of uA , i.e. a load in the order of
100kOhm). Also, according to the DC params table, there is a
considerable tolerance in the pullup's current. >
> JW
> >
> > --- In l..., "daniel.widyanto@..." daniel.widyanto@ wrote: > > >
> > > Hi,
> > >
> > > It's normal. The internal pull up in input mode is not good enough to pull the pin to VDD. > > >
> > > If you put active low LED (1 pin to the VDD 1 pin to the input pin) on the pulled up input pins, you'll see that it's still
glow
although it's quite dim. > > >
> > > Regards,
> > > Daniel
> > >
> > > ----- Reply message -----
> > > From: "amr_mt_bekhit" amrbekhit@
> > > To: l...
> > > Subject: [lpc2000] LPC17xx: Voltage on input pin when pull-up is enabled > > > Date: Tue, Apr 12, 2011 23:19
> > >
> > >
> > > Hello all,
> > >
> > > On the LPC17xx family, the GPIO pins are configured as inputs with the pull-ups enabled on reset. I would therefore expect the voltage
measured on any of those pins to be my power supply voltage, 3.3V.
However, on my device, I'm measuring just over 2V on all of my unused
input pins. The device is working perfectly fine otherwise. When the
pins are set to outputs, they do correctly swing to 3.3V. Is this normal
or do I have a dud chip? >
Reply by Jan Waclawek●April 13, 20112011-04-13
The datasheet in Fig.12 indicates a 0.3V drop from the 3.3V supply for the
pullup. It still does not explain the extra 1V drop, unless you load the pin
"excessively" (read: 10s of uA , i.e. a load in the order of 100kOhm). Also,
according to the DC params table, there is a considerable tolerance in the
pullup's current.
JW
>
> --- In l..., "d...@yahoo.com" wrote:
> >
> > Hi,
> >
> > It's normal. The internal pull up in input mode is not good enough to
pull the pin to VDD.
> >
> > If you put active low LED (1 pin to the VDD 1 pin to the input pin) on the
pulled up input pins, you'll see that it's still glow although
it's quite dim.
> >
> > Regards,
> > Daniel
> >
> > ----- Reply message -----
> > From: "amr_mt_bekhit"
> > To:
> > Subject: [lpc2000] LPC17xx: Voltage on input pin when pull-up is enabled
> > Date: Tue, Apr 12, 2011 23:19
> >
> >
> > Hello all,
> >
> > On the LPC17xx family, the GPIO pins are configured as inputs with the
pull-ups enabled on reset. I would therefore expect the voltage measured on any
of those pins to be my power supply voltage, 3.3V. However, on my device,
I'm measuring just over 2V on all of my unused input pins. The device is
working perfectly fine otherwise. When the pins are set to outputs, they do
correctly swing to 3.3V. Is this normal or do I have a dud chip?
