thanks for your replies.
I've recheck the cclk obtains after PLL0, and I have seen that I was wrong
about the supposed cclk... Sorry guys...
I've also updated the system_LPC17xx to the vesion 1.1 in place of 1.03.
Thanks all
--- In l..., "alexander_ribero" wrote: >
> I concur.
>
> Regards,
>
> Alex.
> --- In l..., "Michael Freeman" wrote:
> >
> > What are you saying there Phil? We have used most of the CMSIS libs with
> > great success. We are using a LPC1788 in our newest design and have 4
serial
> > ports, and 3 are in auto 485 mode. Working like a champ. They are very
well
> > written, I would recommend that all new designs use them.
> >
> > Regards,
> > Michael Freeman
> > Principal Design Engineer
> > Update Systems, Inc.
> >
> >
> > -----Original Message-----
> > From: l... [mailto:l...]On Behalf Of
> > Phil Young
> > Sent: Wednesday, November 02, 2011 9:39 AM
> > To: l...
> > Subject: RE: [lpc2000] Re: Uart0 on LPC1768 (LPC 17xx familly)
> >
> >
> >
> > I would be cautious about the latest CMSIS uart driver for the LPC17xx,
> > our
> > RTOS supplier reported a bug in the Uart drivers in the latest version,
I
> > haven't verified this but it broke their code.!
> >
> > From: l... [mailto:l...] On Behalf
> > Of
> > alexander_ribero
> > Sent: 02 November 2011 14:17
> > To: l...
> > Subject: [lpc2000] Re: Uart0 on LPC1768 (LPC 17xx familly)
> >
> > Hi:
> >
> > I would suggest using the latest CMSIS libraries for the LPC175x/6x
> > processors, found here:
> >
> >
http://ics.nxp.com/support/documents/microcontrollers/zip/lpc177x.lpc178x.
> > cm
> > sis.driver.library.zip
> >
> > It contains detailed examples of how to use the UART in different modes
> > (polling, interrupt,etc).
> >
> > Regards,
> >
> > Alex
> >
> > --- In l... , "Phil
> > Young" wrote:
> > >
> > > Hi Fabian,
> > >
> > > The numbers in the register do not correspond to the comments in the
> > code.
> > >
> > > LPC_UART0->FDR = 0x87; // DIVADDVAL =5 and MULVAL=8
> > >
> > >
> > >
> > > You don't specify what the main PLL clock frequency is set to,
although
> > > normally I would use 100MHz for this board.
> > >
> > >
> > >
> > > BaudRate = PClk / (16 * (256 * DLL + DLM) * (1 + DAV/MV))).
> > >
> > >
> > >
> > > Taking the figures actually used in the code
> > >
> > > DLL = 3, DLM = 0, DAV = 7, MV = 8
> > >
> > >
> > >
> > > BaudRate = PClk / (16 * 3 * 15 / 8) = PClk / 90
> > >
> > >
> > >
> > > So for 115200 Baud you would need a system clock of 10.368MHz with
these
> > > settings.
> > >
> > >
> > >
> > > Basically there is information missing in the description, i.e. What
is
> > the
> > > system clock rate set to, it certainly doesn't seem like the PLL
is
> > enabled.
> > >
> > >
> > >
> > > We need to know more information, i.e.
> > >
> > > What clock source is driving the PLL ( CLKSRCSEL[1:0]).
> > >
> > > What Xtal frequency is used
> > >
> > > What PLL dividers are set to ( PLL0CON, PLL0CFG, PLL0STAT )
> > >
> > > What core clock division is applied (CCLKCFG[7:0] )
> > >
> > > These factors determine the core clock ( cclk ), which appears to be
> > around
> > > 9 MHz from what you describe.
> > >
> > >
> > >
> > > Regards
> > >
> > >
> > >
> > > Phil.
> > >
> > >
> > >
> > >
> > >
> > > From: l...
> > [mailto:l... ] On
> > Behalf Of
> > > Fabian
> > > Sent: 02 November 2011 09:47
> > > To: l...
> > > Subject: [lpc2000] Uart0 on LPC1768 (LPC 17xx familly)
> > >
> > >
> > >
> > >
> > >
> > > Hi everybody,
> > >
> > > I try to use the Uart0 on my lpc1768, but after a lot of hours I
can't
> > > obtain the correct baudrate. So communication is wrong.
> > >
> > > Some one have a simple example to explain me how I can do correctly?
> > >
> > > Here is extract of my codes and comments
> > >
> > > 1) First of all, in the main, I call the SystemInit function (writed
by
> > > nxp team - file system_LPC17xx.c vs 1.03) where clock and peripherals
> > > are activated.
> > > So for uart0 : PCON =0x042887DE;
> > >
> > > 2) I call the my UARTInit() function with a baudrate of 115200
> > >
> > > 3) in a while loop, two characters are write on the uart with a
little
> > > delay. This is just a test for the uart but with this I see that the
> > > baudrate is wrong. With an analyser I see that the effective baudrate
is
> > > approximatively 100000 and not 115200.
> > >
> > > I think that the problem is with the configuration of the clock
> > > (unappropriate PLL ?) or may be I'm wrong with the MULVAL/DIVVAL
... ?
> > >
> > > Here under the UARTInit() function
> > >
> > > uint32_t UARTInit( uint32_t baudrate )
> > > {
> > > uint32_t Fdiv;
> > > uint32_t pclkdiv, pclk;
> > > char tempbuf[256];
> > >
> > > LPC_PINCON->PINSEL0 &= ~0x000000F0;
> > > LPC_PINCON->PINSEL0 |= 0x00000050; /* RxD0 is P0.3 and TxD0 is P0.2
> > > */
> > >
> > > pclkdiv = (LPC_SC->PCLKSEL0 >> 6) & 0x03; //select PCLK_UART0 in
> > > PCLKSEL0, bit 6 et 7
> > >
> > > // PCLK is 01 in
> > >
> > > switch ( pclkdiv )
> > > {
> > > case 0x00:
> > > default:
> > > pclk = SystemFrequency/4;
> > > break;
> > > case 0x01:
> > > pclk = SystemFrequency;
> > > break;
> > > case 0x02:
> > > pclk = SystemFrequency/2;
> > > break;
> > > case 0x03:
> > > pclk = SystemFrequency/8;
> > > break;
> > > }
> > >
> > > LPC_UART0->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
> > >
> > > LPC_UART0->DLM = 0x00; //sse algorithm in the datasheet
> > > LPC_UART0->DLL = 0x03;
> > >
> > > LPC_UART0->FDR = 0x87; // DIVADDVAL =5 and MULVAL=8
> > >
> > > LPC_UART0->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
> > > LPC_UART0->LCR = 0x03; /* DLAB = 0 */
> > >
> > > NVIC_EnableIRQ(UART0_IRQn);
> > >
> > > LPC_UART0->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART0
> > > interrupt */
> > > return (TRUE);
> > >
> > > }
> > >
> > > Some one can help me?
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> > >
> >
> >
> >
> >
> >
> >
> >
> >
> >
>
Reply by alexander_ribero●November 2, 20112011-11-02
I concur.
Regards,
Alex.
--- In l..., "Michael Freeman" wrote: >
> What are you saying there Phil? We have used most of the CMSIS libs with
> great success. We are using a LPC1788 in our newest design and have 4
serial
> ports, and 3 are in auto 485 mode. Working like a champ. They are very well
> written, I would recommend that all new designs use them.
>
> Regards,
> Michael Freeman
> Principal Design Engineer
> Update Systems, Inc.
> -----Original Message-----
> From: l... [mailto:l...]On Behalf Of
> Phil Young
> Sent: Wednesday, November 02, 2011 9:39 AM
> To: l...
> Subject: RE: [lpc2000] Re: Uart0 on LPC1768 (LPC 17xx familly)
>
> I would be cautious about the latest CMSIS uart driver for the LPC17xx,
> our
> RTOS supplier reported a bug in the Uart drivers in the latest version, I
> haven't verified this but it broke their code.!
>
> From: l... [mailto:l...] On Behalf
> Of
> alexander_ribero
> Sent: 02 November 2011 14:17
> To: l...
> Subject: [lpc2000] Re: Uart0 on LPC1768 (LPC 17xx familly)
>
> Hi:
>
> I would suggest using the latest CMSIS libraries for the LPC175x/6x
> processors, found here:
>
>
http://ics.nxp.com/support/documents/microcontrollers/zip/lpc177x.lpc178x.
> cm
> sis.driver.library.zip
>
> It contains detailed examples of how to use the UART in different modes
> (polling, interrupt,etc).
>
> Regards,
>
> Alex
>
> --- In l... , "Phil
> Young" wrote:
> >
> > Hi Fabian,
> >
> > The numbers in the register do not correspond to the comments in the
> code.
> >
> > LPC_UART0->FDR = 0x87; // DIVADDVAL =5 and MULVAL=8
> >
> >
> >
> > You don't specify what the main PLL clock frequency is set to,
although
> > normally I would use 100MHz for this board.
> >
> >
> >
> > BaudRate = PClk / (16 * (256 * DLL + DLM) * (1 + DAV/MV))).
> >
> >
> >
> > Taking the figures actually used in the code
> >
> > DLL = 3, DLM = 0, DAV = 7, MV = 8
> >
> >
> >
> > BaudRate = PClk / (16 * 3 * 15 / 8) = PClk / 90
> >
> >
> >
> > So for 115200 Baud you would need a system clock of 10.368MHz with
these
> > settings.
> >
> >
> >
> > Basically there is information missing in the description, i.e. What is
> the
> > system clock rate set to, it certainly doesn't seem like the PLL
is
> enabled.
> >
> >
> >
> > We need to know more information, i.e.
> >
> > What clock source is driving the PLL ( CLKSRCSEL[1:0]).
> >
> > What Xtal frequency is used
> >
> > What PLL dividers are set to ( PLL0CON, PLL0CFG, PLL0STAT )
> >
> > What core clock division is applied (CCLKCFG[7:0] )
> >
> > These factors determine the core clock ( cclk ), which appears to be
> around
> > 9 MHz from what you describe.
> >
> >
> >
> > Regards
> >
> >
> >
> > Phil.
> >
> >
> >
> >
> >
> > From: l...
> [mailto:l... ] On
> Behalf Of
> > Fabian
> > Sent: 02 November 2011 09:47
> > To: l...
> > Subject: [lpc2000] Uart0 on LPC1768 (LPC 17xx familly)
> >
> >
> >
> >
> >
> > Hi everybody,
> >
> > I try to use the Uart0 on my lpc1768, but after a lot of hours I
can't
> > obtain the correct baudrate. So communication is wrong.
> >
> > Some one have a simple example to explain me how I can do correctly?
> >
> > Here is extract of my codes and comments
> >
> > 1) First of all, in the main, I call the SystemInit function (writed by
> > nxp team - file system_LPC17xx.c vs 1.03) where clock and peripherals
> > are activated.
> > So for uart0 : PCON =0x042887DE;
> >
> > 2) I call the my UARTInit() function with a baudrate of 115200
> >
> > 3) in a while loop, two characters are write on the uart with a little
> > delay. This is just a test for the uart but with this I see that the
> > baudrate is wrong. With an analyser I see that the effective baudrate
is
> > approximatively 100000 and not 115200.
> >
> > I think that the problem is with the configuration of the clock
> > (unappropriate PLL ?) or may be I'm wrong with the MULVAL/DIVVAL ...
?
> >
> > Here under the UARTInit() function
> >
> > uint32_t UARTInit( uint32_t baudrate )
> > {
> > uint32_t Fdiv;
> > uint32_t pclkdiv, pclk;
> > char tempbuf[256];
> >
> > LPC_PINCON->PINSEL0 &= ~0x000000F0;
> > LPC_PINCON->PINSEL0 |= 0x00000050; /* RxD0 is P0.3 and TxD0 is P0.2
> > */
> >
> > pclkdiv = (LPC_SC->PCLKSEL0 >> 6) & 0x03; //select PCLK_UART0 in
> > PCLKSEL0, bit 6 et 7
> >
> > // PCLK is 01 in
> >
> > switch ( pclkdiv )
> > {
> > case 0x00:
> > default:
> > pclk = SystemFrequency/4;
> > break;
> > case 0x01:
> > pclk = SystemFrequency;
> > break;
> > case 0x02:
> > pclk = SystemFrequency/2;
> > break;
> > case 0x03:
> > pclk = SystemFrequency/8;
> > break;
> > }
> >
> > LPC_UART0->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
> >
> > LPC_UART0->DLM = 0x00; //sse algorithm in the datasheet
> > LPC_UART0->DLL = 0x03;
> >
> > LPC_UART0->FDR = 0x87; // DIVADDVAL =5 and MULVAL=8
> >
> > LPC_UART0->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
> > LPC_UART0->LCR = 0x03; /* DLAB = 0 */
> >
> > NVIC_EnableIRQ(UART0_IRQn);
> >
> > LPC_UART0->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART0
> > interrupt */
> > return (TRUE);
> >
> > }
> >
> > Some one can help me?
> >
> >
> >
> >
> >
> >
> >
> >
> >
>
>
>
>
Reply by Phil Young●November 2, 20112011-11-02
As I said I haven't verified this, it was reported to me by the company
who
provide our RTOS so I would be cautious.
It may be fine but this is the comment from them.
"my uart baudate problem was resolved when i added a call to the CMSIS 1.x
uart baud rate setup code immediately after calling the CMSIS 2.x
UART_Init() code. i found in NXP forums on the web that the CMSIS 2.x uart
baud rate code is reported to be incorrect. so , i suspect my fix was
correct - but admittedly ugly. the LPC1768 core on my MCB1700 is running at
100 MHz according to CMSIS at least by using default CMSIS setup. -"
Regards
Phil.
From: l... [mailto:l...] On Behalf Of
Michael Freeman
Sent: 02 November 2011 14:58
To: l...
Subject: RE: [lpc2000] Re: Uart0 on LPC1768 (LPC 17xx familly)
What are you saying there Phil? We have used most of the CMSIS libs with
great success. We are using a LPC1788 in our newest design and have 4 serial
ports, and 3 are in auto 485 mode. Working like a champ. They are very well
written, I would recommend that all new designs use them.
Regards,
Michael Freeman
Principal Design Engineer
Update Systems, Inc.
-----Original Message-----
From: l...
[mailto:l... ]On
Behalf Of
Phil Young
Sent: Wednesday, November 02, 2011 9:39 AM
To: l...
Subject: RE: [lpc2000] Re: Uart0 on LPC1768 (LPC 17xx familly)
I would be cautious about the latest CMSIS uart driver for the LPC17xx,
our
RTOS supplier reported a bug in the Uart drivers in the latest version, I
haven't verified this but it broke their code.!
From: l...
[mailto:l... ] On
Behalf
Of
alexander_ribero
Sent: 02 November 2011 14:17
To: l...
Subject: [lpc2000] Re: Uart0 on LPC1768 (LPC 17xx familly)
Hi:
I would suggest using the latest CMSIS libraries for the LPC175x/6x
processors, found here:
It contains detailed examples of how to use the UART in different modes
(polling, interrupt,etc).
Regards,
Alex
--- In l...
, "Phil
Young" wrote: >
> Hi Fabian,
>
> The numbers in the register do not correspond to the comments in the code. >
> LPC_UART0->FDR = 0x87; // DIVADDVAL =5 and MULVAL=8
>
> You don't specify what the main PLL clock frequency is set to,
although
> normally I would use 100MHz for this board.
>
> BaudRate = PClk / (16 * (256 * DLL + DLM) * (1 + DAV/MV))).
>
> Taking the figures actually used in the code
>
> DLL = 3, DLM = 0, DAV = 7, MV = 8
>
> BaudRate = PClk / (16 * 3 * 15 / 8) = PClk / 90
>
> So for 115200 Baud you would need a system clock of 10.368MHz with these
> settings.
>
> Basically there is information missing in the description, i.e. What is the > system clock rate set to, it certainly doesn't
seem like the PLL is enabled. >
> We need to know more information, i.e.
>
> What clock source is driving the PLL ( CLKSRCSEL[1:0]).
>
> What Xtal frequency is used
>
> What PLL dividers are set to ( PLL0CON, PLL0CFG, PLL0STAT )
>
> What core clock division is applied (CCLKCFG[7:0] )
>
> These factors determine the core clock ( cclk ), which appears to be around > 9 MHz from what you describe.
>
> Regards
>
> Phil.
>
> From: l...
[mailto:l...
] On
Behalf Of > Fabian
> Sent: 02 November 2011 09:47
> To: l...
> Subject: [lpc2000] Uart0 on LPC1768 (LPC 17xx
familly)
>
> Hi everybody,
>
> I try to use the Uart0 on my lpc1768, but after a lot of hours I can't
> obtain the correct baudrate. So communication is wrong.
>
> Some one have a simple example to explain me how I can do correctly?
>
> Here is extract of my codes and comments
>
> 1) First of all, in the main, I call the SystemInit function (writed by
> nxp team - file system_LPC17xx.c vs 1.03) where clock and peripherals
> are activated.
> So for uart0 : PCON =0x042887DE;
>
> 2) I call the my UARTInit() function with a baudrate of 115200
>
> 3) in a while loop, two characters are write on the uart with a little
> delay. This is just a test for the uart but with this I see that the
> baudrate is wrong. With an analyser I see that the effective baudrate is
> approximatively 100000 and not 115200.
>
> I think that the problem is with the configuration of the clock
> (unappropriate PLL ?) or may be I'm wrong with the MULVAL/DIVVAL ... ?
>
> Here under the UARTInit() function
>
> uint32_t UARTInit( uint32_t baudrate )
> {
> uint32_t Fdiv;
> uint32_t pclkdiv, pclk;
> char tempbuf[256];
>
> LPC_PINCON->PINSEL0 &= ~0x000000F0;
> LPC_PINCON->PINSEL0 |= 0x00000050; /* RxD0 is P0.3 and TxD0 is P0.2
> */
>
> pclkdiv = (LPC_SC->PCLKSEL0 >> 6) & 0x03; //select PCLK_UART0 in
> PCLKSEL0, bit 6 et 7
>
> // PCLK is 01 in
>
> switch ( pclkdiv )
> {
> case 0x00:
> default:
> pclk = SystemFrequency/4;
> break;
> case 0x01:
> pclk = SystemFrequency;
> break;
> case 0x02:
> pclk = SystemFrequency/2;
> break;
> case 0x03:
> pclk = SystemFrequency/8;
> break;
> }
>
> LPC_UART0->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
>
> LPC_UART0->DLM = 0x00; //sse algorithm in the datasheet
> LPC_UART0->DLL = 0x03;
>
> LPC_UART0->FDR = 0x87; // DIVADDVAL =5 and MULVAL=8
>
> LPC_UART0->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
> LPC_UART0->LCR = 0x03; /* DLAB = 0 */
>
> NVIC_EnableIRQ(UART0_IRQn);
>
> LPC_UART0->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART0
> interrupt */
> return (TRUE);
>
> }
>
> Some one can help me?
>
>
>
>
>
Reply by Michael Freeman●November 2, 20112011-11-02
What are you saying there Phil? We have used most of the CMSIS libs with
great success. We are using a LPC1788 in our newest design and have 4 serial
ports, and 3 are in auto 485 mode. Working like a champ. They are very well
written, I would recommend that all new designs use them.
Regards,
Michael Freeman
Principal Design Engineer
Update Systems, Inc.
-----Original Message-----
From: l... [mailto:l...]On Behalf Of
Phil Young
Sent: Wednesday, November 02, 2011 9:39 AM
To: l...
Subject: RE: [lpc2000] Re: Uart0 on LPC1768 (LPC 17xx familly)
I would be cautious about the latest CMSIS uart driver for the LPC17xx,
our
RTOS supplier reported a bug in the Uart drivers in the latest version, I
haven't verified this but it broke their code.!
From: l... [mailto:l...] On Behalf
Of
alexander_ribero
Sent: 02 November 2011 14:17
To: l...
Subject: [lpc2000] Re: Uart0 on LPC1768 (LPC 17xx familly)
Hi:
I would suggest using the latest CMSIS libraries for the LPC175x/6x
processors, found here:
It contains detailed examples of how to use the UART in different modes
(polling, interrupt,etc).
Regards,
Alex
--- In l... , "Phil
Young" wrote:
>
> Hi Fabian,
>
> The numbers in the register do not correspond to the comments in the
code.
>
> LPC_UART0->FDR = 0x87; // DIVADDVAL =5 and MULVAL=8
>
>
>
> You don't specify what the main PLL clock frequency is set to,
although
> normally I would use 100MHz for this board.
>
>
>
> BaudRate = PClk / (16 * (256 * DLL + DLM) * (1 + DAV/MV))).
>
>
>
> Taking the figures actually used in the code
>
> DLL = 3, DLM = 0, DAV = 7, MV = 8
>
>
>
> BaudRate = PClk / (16 * 3 * 15 / 8) = PClk / 90
>
>
>
> So for 115200 Baud you would need a system clock of 10.368MHz with these
> settings.
>
>
>
> Basically there is information missing in the description, i.e. What is
the
> system clock rate set to, it certainly doesn't seem like the PLL is
enabled.
>
>
>
> We need to know more information, i.e.
>
> What clock source is driving the PLL ( CLKSRCSEL[1:0]).
>
> What Xtal frequency is used
>
> What PLL dividers are set to ( PLL0CON, PLL0CFG, PLL0STAT )
>
> What core clock division is applied (CCLKCFG[7:0] )
>
> These factors determine the core clock ( cclk ), which appears to be
around
> 9 MHz from what you describe.
>
>
>
> Regards
>
>
>
> Phil.
>
>
>
>
>
> From: l...
[mailto:l... ] On
Behalf Of
> Fabian
> Sent: 02 November 2011 09:47
> To: l...
> Subject: [lpc2000] Uart0 on LPC1768 (LPC 17xx familly)
>
>
>
>
>
> Hi everybody,
>
> I try to use the Uart0 on my lpc1768, but after a lot of hours I
can't
> obtain the correct baudrate. So communication is wrong.
>
> Some one have a simple example to explain me how I can do correctly?
>
> Here is extract of my codes and comments
>
> 1) First of all, in the main, I call the SystemInit function (writed by
> nxp team - file system_LPC17xx.c vs 1.03) where clock and peripherals
> are activated.
> So for uart0 : PCON =0x042887DE;
>
> 2) I call the my UARTInit() function with a baudrate of 115200
>
> 3) in a while loop, two characters are write on the uart with a little
> delay. This is just a test for the uart but with this I see that the
> baudrate is wrong. With an analyser I see that the effective baudrate is
> approximatively 100000 and not 115200.
>
> I think that the problem is with the configuration of the clock
> (unappropriate PLL ?) or may be I'm wrong with the MULVAL/DIVVAL ...
?
>
> Here under the UARTInit() function
>
> uint32_t UARTInit( uint32_t baudrate )
> {
> uint32_t Fdiv;
> uint32_t pclkdiv, pclk;
> char tempbuf[256];
>
> LPC_PINCON->PINSEL0 &= ~0x000000F0;
> LPC_PINCON->PINSEL0 |= 0x00000050; /* RxD0 is P0.3 and TxD0 is P0.2
> */
>
> pclkdiv = (LPC_SC->PCLKSEL0 >> 6) & 0x03; //select PCLK_UART0 in
> PCLKSEL0, bit 6 et 7
>
> // PCLK is 01 in
>
> switch ( pclkdiv )
> {
> case 0x00:
> default:
> pclk = SystemFrequency/4;
> break;
> case 0x01:
> pclk = SystemFrequency;
> break;
> case 0x02:
> pclk = SystemFrequency/2;
> break;
> case 0x03:
> pclk = SystemFrequency/8;
> break;
> }
>
> LPC_UART0->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
>
> LPC_UART0->DLM = 0x00; //sse algorithm in the datasheet
> LPC_UART0->DLL = 0x03;
>
> LPC_UART0->FDR = 0x87; // DIVADDVAL =5 and MULVAL=8
>
> LPC_UART0->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
> LPC_UART0->LCR = 0x03; /* DLAB = 0 */
>
> NVIC_EnableIRQ(UART0_IRQn);
>
> LPC_UART0->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART0
> interrupt */
> return (TRUE);
>
> }
>
> Some one can help me?
>
>
>
>
>
>
>
>
>
Reply by Phil Young●November 2, 20112011-11-02
I would be cautious about the latest CMSIS uart driver for the LPC17xx, our
RTOS supplier reported a bug in the Uart drivers in the latest version, I
haven't verified this but it broke their code.!
From: l... [mailto:l...] On Behalf Of
alexander_ribero
Sent: 02 November 2011 14:17
To: l...
Subject: [lpc2000] Re: Uart0 on LPC1768 (LPC 17xx familly)
Hi:
I would suggest using the latest CMSIS libraries for the LPC175x/6x
processors, found here:
It contains detailed examples of how to use the UART in different modes
(polling, interrupt,etc).
Regards,
Alex
--- In l... , "Phil
Young" wrote: >
> Hi Fabian,
>
> The numbers in the register do not correspond to the comments in the code.
>
> LPC_UART0->FDR = 0x87; // DIVADDVAL =5 and MULVAL=8
>
> You don't specify what the main PLL clock frequency is set to,
although
> normally I would use 100MHz for this board.
>
> BaudRate = PClk / (16 * (256 * DLL + DLM) * (1 + DAV/MV))).
>
> Taking the figures actually used in the code
>
> DLL = 3, DLM = 0, DAV = 7, MV = 8
>
> BaudRate = PClk / (16 * 3 * 15 / 8) = PClk / 90
>
> So for 115200 Baud you would need a system clock of 10.368MHz with these
> settings.
>
> Basically there is information missing in the description, i.e. What is the > system clock rate set to, it certainly doesn't
seem like the PLL is enabled. >
> We need to know more information, i.e.
>
> What clock source is driving the PLL ( CLKSRCSEL[1:0]).
>
> What Xtal frequency is used
>
> What PLL dividers are set to ( PLL0CON, PLL0CFG, PLL0STAT )
>
> What core clock division is applied (CCLKCFG[7:0] )
>
> These factors determine the core clock ( cclk ), which appears to be around > 9 MHz from what you describe.
>
> Regards
>
> Phil.
>
> From: l... [mailto:l... ] On
Behalf Of > Fabian
> Sent: 02 November 2011 09:47
> To: l...
> Subject: [lpc2000] Uart0 on LPC1768 (LPC 17xx familly)
>
> Hi everybody,
>
> I try to use the Uart0 on my lpc1768, but after a lot of hours I can't
> obtain the correct baudrate. So communication is wrong.
>
> Some one have a simple example to explain me how I can do correctly?
>
> Here is extract of my codes and comments
>
> 1) First of all, in the main, I call the SystemInit function (writed by
> nxp team - file system_LPC17xx.c vs 1.03) where clock and peripherals
> are activated.
> So for uart0 : PCON =0x042887DE;
>
> 2) I call the my UARTInit() function with a baudrate of 115200
>
> 3) in a while loop, two characters are write on the uart with a little
> delay. This is just a test for the uart but with this I see that the
> baudrate is wrong. With an analyser I see that the effective baudrate is
> approximatively 100000 and not 115200.
>
> I think that the problem is with the configuration of the clock
> (unappropriate PLL ?) or may be I'm wrong with the MULVAL/DIVVAL ... ?
>
> Here under the UARTInit() function
>
> uint32_t UARTInit( uint32_t baudrate )
> {
> uint32_t Fdiv;
> uint32_t pclkdiv, pclk;
> char tempbuf[256];
>
> LPC_PINCON->PINSEL0 &= ~0x000000F0;
> LPC_PINCON->PINSEL0 |= 0x00000050; /* RxD0 is P0.3 and TxD0 is P0.2
> */
>
> pclkdiv = (LPC_SC->PCLKSEL0 >> 6) & 0x03; //select PCLK_UART0 in
> PCLKSEL0, bit 6 et 7
>
> // PCLK is 01 in
>
> switch ( pclkdiv )
> {
> case 0x00:
> default:
> pclk = SystemFrequency/4;
> break;
> case 0x01:
> pclk = SystemFrequency;
> break;
> case 0x02:
> pclk = SystemFrequency/2;
> break;
> case 0x03:
> pclk = SystemFrequency/8;
> break;
> }
>
> LPC_UART0->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
>
> LPC_UART0->DLM = 0x00; //sse algorithm in the datasheet
> LPC_UART0->DLL = 0x03;
>
> LPC_UART0->FDR = 0x87; // DIVADDVAL =5 and MULVAL=8
>
> LPC_UART0->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
> LPC_UART0->LCR = 0x03; /* DLAB = 0 */
>
> NVIC_EnableIRQ(UART0_IRQn);
>
> LPC_UART0->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART0
> interrupt */
> return (TRUE);
>
> }
>
> Some one can help me?
>
>
>
>
>
Reply by alexander_ribero●November 2, 20112011-11-02
Hi:
I would suggest using the latest CMSIS libraries for the LPC175x/6x processors,
found here:
It contains detailed examples of how to use the UART in different modes
(polling, interrupt,etc).
Regards,
Alex
--- In l..., "Phil Young" wrote: >
> Hi Fabian,
>
> The numbers in the register do not correspond to the comments in the code.
>
> LPC_UART0->FDR = 0x87; // DIVADDVAL =5 and MULVAL=8
>
>
>
> You don't specify what the main PLL clock frequency is set to,
although
> normally I would use 100MHz for this board.
>
>
>
> BaudRate = PClk / (16 * (256 * DLL + DLM) * (1 + DAV/MV))).
>
>
>
> Taking the figures actually used in the code
>
> DLL = 3, DLM = 0, DAV = 7, MV = 8
>
>
>
> BaudRate = PClk / (16 * 3 * 15 / 8) = PClk / 90
>
>
>
> So for 115200 Baud you would need a system clock of 10.368MHz with these
> settings.
>
>
>
> Basically there is information missing in the description, i.e. What is the
> system clock rate set to, it certainly doesn't seem like the PLL is
enabled.
>
>
>
> We need to know more information, i.e.
>
> What clock source is driving the PLL ( CLKSRCSEL[1:0]).
>
> What Xtal frequency is used
>
> What PLL dividers are set to ( PLL0CON, PLL0CFG, PLL0STAT )
>
> What core clock division is applied (CCLKCFG[7:0] )
>
> These factors determine the core clock ( cclk ), which appears to be around
> 9 MHz from what you describe.
>
>
>
> Regards
>
>
>
> Phil.
>
>
>
>
>
> From: l... [mailto:l...] On Behalf Of
> Fabian
> Sent: 02 November 2011 09:47
> To: l...
> Subject: [lpc2000] Uart0 on LPC1768 (LPC 17xx familly)
>
>
>
>
>
> Hi everybody,
>
> I try to use the Uart0 on my lpc1768, but after a lot of hours I can't
> obtain the correct baudrate. So communication is wrong.
>
> Some one have a simple example to explain me how I can do correctly?
>
> Here is extract of my codes and comments
>
> 1) First of all, in the main, I call the SystemInit function (writed by
> nxp team - file system_LPC17xx.c vs 1.03) where clock and peripherals
> are activated.
> So for uart0 : PCON =0x042887DE;
>
> 2) I call the my UARTInit() function with a baudrate of 115200
>
> 3) in a while loop, two characters are write on the uart with a little
> delay. This is just a test for the uart but with this I see that the
> baudrate is wrong. With an analyser I see that the effective baudrate is
> approximatively 100000 and not 115200.
>
> I think that the problem is with the configuration of the clock
> (unappropriate PLL ?) or may be I'm wrong with the MULVAL/DIVVAL ... ?
>
> Here under the UARTInit() function
>
> uint32_t UARTInit( uint32_t baudrate )
> {
> uint32_t Fdiv;
> uint32_t pclkdiv, pclk;
> char tempbuf[256];
>
> LPC_PINCON->PINSEL0 &= ~0x000000F0;
> LPC_PINCON->PINSEL0 |= 0x00000050; /* RxD0 is P0.3 and TxD0 is P0.2
> */
>
> pclkdiv = (LPC_SC->PCLKSEL0 >> 6) & 0x03; //select PCLK_UART0 in
> PCLKSEL0, bit 6 et 7
>
> // PCLK is 01 in
>
> switch ( pclkdiv )
> {
> case 0x00:
> default:
> pclk = SystemFrequency/4;
> break;
> case 0x01:
> pclk = SystemFrequency;
> break;
> case 0x02:
> pclk = SystemFrequency/2;
> break;
> case 0x03:
> pclk = SystemFrequency/8;
> break;
> }
>
> LPC_UART0->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
>
> LPC_UART0->DLM = 0x00; //sse algorithm in the datasheet
> LPC_UART0->DLL = 0x03;
>
> LPC_UART0->FDR = 0x87; // DIVADDVAL =5 and MULVAL=8
>
> LPC_UART0->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
> LPC_UART0->LCR = 0x03; /* DLAB = 0 */
>
> NVIC_EnableIRQ(UART0_IRQn);
>
> LPC_UART0->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART0
> interrupt */
> return (TRUE);
>
> }
>
> Some one can help me?
>
>
>
>
>
Reply by Phil Young●November 2, 20112011-11-02
Hi Fabian,
The numbers in the register do not correspond to the comments in the code.
LPC_UART0->FDR = 0x87; // DIVADDVAL =5 and MULVAL=8
You don't specify what the main PLL clock frequency is set to, although
normally I would use 100MHz for this board.
So for 115200 Baud you would need a system clock of 10.368MHz with these
settings.
Basically there is information missing in the description, i.e. What is the
system clock rate set to, it certainly doesn't seem like the PLL is
enabled.
We need to know more information, i.e.
What clock source is driving the PLL ( CLKSRCSEL[1:0]).
What Xtal frequency is used
What PLL dividers are set to ( PLL0CON, PLL0CFG, PLL0STAT )
What core clock division is applied (CCLKCFG[7:0] )
These factors determine the core clock ( cclk ), which appears to be around
9 MHz from what you describe.
Regards
Phil.
From: l... [mailto:l...] On Behalf Of
Fabian
Sent: 02 November 2011 09:47
To: l...
Subject: [lpc2000] Uart0 on LPC1768 (LPC 17xx familly)
Hi everybody,
I try to use the Uart0 on my lpc1768, but after a lot of hours I can't
obtain the correct baudrate. So communication is wrong.
Some one have a simple example to explain me how I can do correctly?
Here is extract of my codes and comments
1) First of all, in the main, I call the SystemInit function (writed by
nxp team - file system_LPC17xx.c vs 1.03) where clock and peripherals
are activated.
So for uart0 : PCON =0x042887DE;
2) I call the my UARTInit() function with a baudrate of 115200
3) in a while loop, two characters are write on the uart with a little
delay. This is just a test for the uart but with this I see that the
baudrate is wrong. With an analyser I see that the effective baudrate is
approximatively 100000 and not 115200.
I think that the problem is with the configuration of the clock
(unappropriate PLL ?) or may be I'm wrong with the MULVAL/DIVVAL ... ?
> -----Original Message-----
> From: l... [mailto:l...] On
> Behalf Of Fabian
> Sent: Wednesday, 2 November 2011 8:47 PM
> To: l...
> Subject: [lpc2000] Uart0 on LPC1768 (LPC 17xx familly)
>
> Hi everybody,
>
> I try to use the Uart0 on my lpc1768, but after a lot of hours I can't
obtain the
> correct baudrate. So communication is wrong.
>
> Some one have a simple example to explain me how I can do correctly?
>
> Here is extract of my codes and comments
>
> 1) First of all, in the main, I call the SystemInit function (writed by nxp
team -
> file system_LPC17xx.c vs 1.03) where clock and peripherals are activated.
> So for uart0 : PCON =0x042887DE;
>
> 2) I call the my UARTInit() function with a baudrate of 115200
>
> 3) in a while loop, two characters are write on the uart with a little delay.
This
> is just a test for the uart but with this I see that the baudrate is wrong.
With
> an analyser I see that the effective baudrate is approximatively 100000 and
> not 115200.
> I think that the problem is with the configuration of the clock
(unappropriate
> PLL ?) or may be I'm wrong with the MULVAL/DIVVAL ... ?
> Here under the UARTInit() function
> uint32_t UARTInit( uint32_t baudrate )
> {
> uint32_t Fdiv;
> uint32_t pclkdiv, pclk;
> char tempbuf[256];
> LPC_PINCON->PINSEL0 &= ~0x000000F0;
> LPC_PINCON->PINSEL0 |= 0x00000050; /* RxD0 is P0.3 and TxD0 is P0.2
*/
>
> pclkdiv = (LPC_SC->PCLKSEL0 >> 6) & 0x03; //select PCLK_UART0 in
> PCLKSEL0, bit 6 et 7
>
> // PCLK is 01 in
> switch ( pclkdiv )
> {
> case 0x00:
> default:
> pclk = SystemFrequency/4;
> break;
> case 0x01:
> pclk = SystemFrequency;
> break;
> case 0x02:
> pclk = SystemFrequency/2;
> break;
> case 0x03:
> pclk = SystemFrequency/8;
> break;
> }
>
> LPC_UART0->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
> LPC_UART0->DLM = 0x00; //sse algorithm in the datasheet
> LPC_UART0->DLL = 0x03;
>
> LPC_UART0->FDR = 0x87; // DIVADDVAL =5 and MULVAL=8
>
> LPC_UART0->FCR = 0x07; /* Enable and reset TX and RX FIFO. */
> LPC_UART0->LCR = 0x03; /* DLAB = 0 */
> NVIC_EnableIRQ(UART0_IRQn);
>
> LPC_UART0->IER = IER_RBR | IER_THRE | IER_RLS; /* Enable UART0
> interrupt */
> return (TRUE);
>
> }
This is what I'm using (You seem to have copied the same example code!)
//Initialise UART pin connect
PinCfg.Funcnum = PINSEL_FUNC_3;
PinCfg.OpenDrain = PINSEL_PINMODE_NORMAL;
PinCfg.Pinmode = PINSEL_PINMODE_PULLUP;
PinCfg.Portnum = 0;
PinCfg.Pinnum = 2;
PINSEL_ConfigPin(&PinCfg);
PinCfg.Pinnum = 3;
PINSEL_ConfigPin(&PinCfg);
// Turn on power to UART
CLKPWR_ConfigPPWR (CLKPWR_PCONP_PCUART0, ENABLE);
// By default, the PCLKSELx value is zero, thus, the PCLK for all the
peripherals is 1/4 of the SystemFrequency.
/* Bit 6~7 is for UART0 */
pclkdiv = (LPC_SC->PCLKSEL0 >> 6) & 0x03; //UART0:PCLK
switch ( pclkdiv )
{
case 0x00:
default:
pclk = SystemCoreClock/4;
break;
case 0x01:
pclk = SystemCoreClock;
break;
case 0x02:
pclk = SystemCoreClock/2;
break;
case 0x03:
pclk = SystemCoreClock/8;
break;
}
I try to use the Uart0 on my lpc1768, but after a lot of hours I can't
obtain the correct baudrate. So communication is wrong.
Some one have a simple example to explain me how I can do correctly?
Here is extract of my codes and comments
1) First of all, in the main, I call the SystemInit function (writed by
nxp team - file system_LPC17xx.c vs 1.03) where clock and peripherals
are activated.
So for uart0 : PCON =0x042887DE;
2) I call the my UARTInit() function with a baudrate of 115200
3) in a while loop, two characters are write on the uart with a little
delay. This is just a test for the uart but with this I see that the
baudrate is wrong. With an analyser I see that the effective baudrate is
approximatively 100000 and not 115200.
I think that the problem is with the configuration of the clock
(unappropriate PLL ?) or may be I'm wrong with the MULVAL/DIVVAL ... ?
Here under the UARTInit() function
uint32_t UARTInit( uint32_t baudrate )
{
uint32_t Fdiv;
uint32_t pclkdiv, pclk;
char tempbuf[256];
LPC_PINCON->PINSEL0 &= ~0x000000F0;
LPC_PINCON->PINSEL0 |= 0x00000050; /* RxD0 is P0.3 and TxD0 is P0.2
*/
pclkdiv = (LPC_SC->PCLKSEL0 >> 6) & 0x03; //select PCLK_UART0 in
PCLKSEL0, bit 6 et 7
// PCLK is 01 in
switch ( pclkdiv )
{
case 0x00:
default:
pclk = SystemFrequency/4;
break;
case 0x01:
pclk = SystemFrequency;
break;
case 0x02:
pclk = SystemFrequency/2;
break;
case 0x03:
pclk = SystemFrequency/8;
break;
}
LPC_UART0->LCR = 0x83; /* 8 bits, no Parity, 1 Stop bit */
LPC_UART0->DLM = 0x00; //sse algorithm in the datasheet
LPC_UART0->DLL = 0x03;
LPC_UART0->FDR = 0x87; // DIVADDVAL =5 and MULVAL=8
