Reply by Dimitriy irtos●February 3, 20142014-02-03
Also it is interesting about your results with helix decoder. Write some
notes after.
2014-01-03 Tim Mitchell :
> Paul Curtis wrote:
>
> > ...you do not need interworking, there is nothing to "interwork"
> > with. If you are using CrossWorks, leave the "Interworking" at
> > "Default" on your project and it'll be disabled for Cortex-M3
builds.
> > OK... it appears that the assembler file was being assembled in ARM mode
> for some reason I haven't worked out yet.
> If I put the directives .thumb and .thumbfunc into the assembler then it
> works without interworking.
>
> Thanks for your input everyone.
>
> --
> Tim Mitchell
>
>
>
--
CMake build environment project
for micro-controllers (use
it or
addyou
favorite MCU )
> ...you do not need interworking, there is nothing to
"interwork"
> with. If you are using CrossWorks, leave the "Interworking" at
> "Default" on your project and it'll be disabled for Cortex-M3 builds.
> OK... it appears that the assembler file was being assembled in ARM mode
for some reason I haven't worked out yet.
If I put the directives .thumb and .thumbfunc into the assembler then it works
without interworking.
> c...@internode.on.net wrote:
> >> So why would I go into hardfault when executing the bx pc instruction
> >> in the thumb/arm switching?
> >
> > You don't want it to switch from Thumb to ARM. The Cortex-M3 always
> > runs in Thumb state. The LSB value of the BX target register must be
> > 1. If you are calling a function you should probably be using BLX
> > anyway.
> >
>
> The compiler is generating all this, I'm just looking at the
disassembly
> to track down where the hardfault is occurring.
...you do not need interworking, there is nothing to "interwork" with. If
you are using CrossWorks, leave the "Interworking" at "Default" on your
project and it'll be disabled for Cortex-M3 builds.
Am 03.01.2014 14:09, schrieb Tim Mitchell: > c...@internode.on.net wrote:
>>> So why would I go into hardfault when executing the bx pc instruction
>>> in the thumb/arm switching?
>>
>> You don't want it to switch from Thumb to ARM. The Cortex-M3 always
>> runs in Thumb state. The LSB value of the BX target register must be
>> 1. If you are calling a function you should probably be using BLX
>> anyway.
>> The compiler is generating all this, I'm just looking at the disassembly
to track down where the hardfault is occurring.
So, tell the compiler to generate code for Cortex-M3 (no interworking),
then port the assembly to thumb-2.
Then you're done.
c...@internode.on.net wrote: >> So why would I go into hardfault when executing the
bx pc instruction
>> in the thumb/arm switching?
>
> You don't want it to switch from Thumb to ARM. The Cortex-M3 always
> runs in Thumb state. The LSB value of the BX target register must be
> 1. If you are calling a function you should probably be using BLX
> anyway.
>
The compiler is generating all this, I'm just looking at the disassembly to
track down where the hardfault is occurring.
Reply by cfbs...@internode.on.net●January 3, 20142014-01-03
> Thanks for the informative reply Paul... so my
problem must lie elsewhere.
> I have enabled interworking, (otherwise it won't compile) and I can
> see the thumb/arm switching code which aligns the instructions.
>
> So why would I go into hardfault when executing the bx pc instruction
> in the thumb/arm switching?
>
You don't want it to switch from Thumb to ARM. The Cortex-M3 always runs
in Thumb state. The LSB value of the BX target register must be 1. If you are
calling a function you should probably be using BLX anyway.
> >> I am trying to get the Helix mp3 decoder library
running on an
> >> LPC1765. The NXP port of the decoder provides an assembler file
> >> asmpoly_gcc.s to do the time-critical stuff. However this contains
> >> ARM (non-thumb) instructions such as SMLAL and when I call the
> >> assembly routine I drop into the hardfault handler. (this happens on
> >> the bx pc instruction which is supposed to swap the registers)
> >>
> >> They show the library running on an LPC1768... but I am confused, I
> >> thought the Cortex M3 only allowed Thumb instructions ... is it
> >> possible to run full ARM instructions on it?
> >
> > Cortex-M3 runs the full Thumb-2 instruction set; this includes 16-bit
> > Thumb instructions that you'd find on things like the LPC2000 in
Thumb
> > mode and Cortex-M0, and also Thumb-2 instructions that are 32-bits
> > wide. Many ARM instructions have a direct Thumb or Thumb-2
> > equivalent, but not all. This is why ARM introduced "unified syntax"
> > where you can write a Thumb or Thumb-2 instruction in source code and
> > have the assembler convert it to whatever is required in ARM, Thumb,
> > or Thumb-2 encoding. If it can't then you get an error.
> >
> > In your case, SMLAL is a signed multiply-accumulate and is described
> > as a Thumb-2 instruction here:
>
>
> Thanks for the informative reply Paul... so my problem must lie elsewhere.
> I have enabled interworking, (otherwise it won't compile) and I can
see
> the thumb/arm switching code which aligns the instructions.
There is no ARM MODE on an LPC1700... The processor is always in Thumb
mode.
> So why would I go into hardfault when executing the
bx pc instruction in
> the thumb/arm switching?
This should never happen; bx pc is not required on Thumb-2 processors (I
believe) because no ARM-Thumb switch is ever required.
Paul Curtis wrote: > Hi Tim,
>> Hi folks
>> I am trying to get the Helix mp3 decoder library running on an
>> LPC1765. The NXP port of the decoder provides an assembler file
>> asmpoly_gcc.s to do the time-critical stuff. However this contains
>> ARM (non-thumb) instructions such as SMLAL and when I call the
>> assembly routine I drop into the hardfault handler. (this happens on
>> the bx pc instruction which is supposed to swap the registers)
>>
>> They show the library running on an LPC1768... but I am confused, I
>> thought the Cortex M3 only allowed Thumb instructions ... is it
>> possible to run full ARM instructions on it?
>
> Cortex-M3 runs the full Thumb-2 instruction set; this includes 16-bit
> Thumb instructions that you'd find on things like the LPC2000 in
> Thumb mode and Cortex-M0, and also Thumb-2 instructions that are
> 32-bits wide. Many ARM instructions have a direct Thumb or Thumb-2
> equivalent, but not all. This is why ARM introduced "unified syntax"
> where you can write a Thumb or Thumb-2 instruction in source code and
> have the assembler convert it to whatever is required in ARM, Thumb,
> or Thumb-2 encoding. If it can't then you get an error.
>
> In your case, SMLAL is a signed multiply-accumulate and is described
> as a Thumb-2 instruction here:
Thanks for the informative reply Paul... so my problem must lie elsewhere.
I have enabled interworking, (otherwise it won't compile) and I can see the
thumb/arm switching code which aligns the instructions.
So why would I go into hardfault when executing the bx pc instruction in the
thumb/arm switching?
> Hi folks
> I am trying to get the Helix mp3 decoder library running on an LPC1765.
> The NXP port of the decoder provides an assembler file asmpoly_gcc.s to do
> the time-critical stuff. However this contains ARM (non-thumb)
> instructions such as SMLAL and when I call the assembly routine I drop
> into the hardfault handler. (this happens on the bx pc instruction which
> is supposed to swap the registers)
>
> They show the library running on an LPC1768... but I am confused, I
> thought the Cortex M3 only allowed Thumb instructions ... is it possible
> to run full ARM instructions on it?
Cortex-M3 runs the full Thumb-2 instruction set; this includes 16-bit Thumb
instructions that you'd find on things like the LPC2000 in Thumb mode
and
Cortex-M0, and also Thumb-2 instructions that are 32-bits wide. Many ARM
instructions have a direct Thumb or Thumb-2 equivalent, but not all. This
is why ARM introduced "unified syntax" where you can write a Thumb or
Thumb-2 instruction in source code and have the assembler convert it to
whatever is required in ARM, Thumb, or Thumb-2 encoding. If it can't
then
you get an error.
In your case, SMLAL is a signed multiply-accumulate and is described as a
Thumb-2 instruction here:
Hi folks
I am trying to get the Helix mp3 decoder library running on an LPC1765.
The NXP port of the decoder provides an assembler file asmpoly_gcc.s to do the
time-critical stuff. However this contains ARM (non-thumb) instructions such as
SMLAL and when I call the assembly routine I drop into the hardfault handler.
(this happens on the bx pc instruction which is supposed to swap the
registers)
They show the library running on an LPC1768... but I am confused, I thought the
Cortex M3 only allowed Thumb instructions ... is it possible to run full ARM
instructions on it?
--
Tim Mitchell
