```On 24 Oct 2004 14:41:41 -0700, the renowned csembro@yahoo.com (Chuck)
wrote:

>Spehro Pefhany <speffSNIP@interlogDOTyou.knowwhat> wrote in message news:<avgdn05bp26eo94gnuigmrsl3qhq0dn4i7@4ax.com>...
>> On 20 Oct 2004 12:18:52 -0700, the renowned csembro@yahoo.com (Chuck)
>> wrote:
>
>snip
>
>> >Last year I was driving the LED's from a simple 12V DC power supply.
>> >Their cathodes are connected together and to ground.  The anodes
>> >connected to appropriate resistors.
>
>>                    x------[Rx]----|<|---- +12 (12V)
>>                    |               \\\
>>                    |               LED
>>                    |
>>               B  |/C
>> -----[2K7]-------|
>>                  |\E  2N2222A, 2N4401 etc.
>>                    |
>>                    |
>> 0V (5V) -----------x----------------------- 0V (12V)
>>
>>
>> Only tie the 12V supply ground to the 5V supply ground at one point.
>> (Do not allow the LED current to flow through the 5V ground circuit).
>>
>> If you're using 30mA maximum, then a forced beta of 20 would imply a
>> base current of 1.5mA, so 2.7K is about right.
>>
>> To calculate Rx, you need to know the LED forward voltage Vf. If
>> you're not sure, use 2.5 for yellow or green LEDs, 3V for white or
>> blue, and 2.0 for red.
>
>snip
>
>> Spehro Pefhany
>
>Thanks Spehro,
>
>Your circuit looks exactly like several others I've found on the web.
>But it inspires me to ask two more questions.  How do I know what
>amount of base current will drive the transistor to saturation?  Is
>this what Hfe is used for?

Yes, sorta. I know the hFE of those parts is fairly high (at 20-30mA
Ic and at normal temperature, and a bit of extra drop won't fry the
transistor), so to drive them well into saturation I use Ic/Ib = 20
(that's what I mean above by "forced beta" = forced hFE). You might
pick 10 or 25 as well- it's a fairly conservative number, but often
parts are actually spec'd at 10.

See, for example, the graph on page 3- top right for data
http://www.fairchildsemi.com/ds/2N/2N3904.pdf

>One of my problems in design is that all the LED collectors are tied
>to ground.  In order to use your design, I'll have to unsolder all my
>wires and tie the anodes together instead.  Is there a way to avoid
>all this rework?
>
>Chuck

If there's no common between the supplies, you can tie the + sides
together (if there *is* already a common this step could damage a lot
of stuff), then flip the above circuit, using a PNP transistor. You'll
make the input "low" to turn the LED on:

+5, +12V (12V supply)

2K7       |
___    |<
Microcontroller -|___|- -|   2N3906/2N4403 etc.
high = off               |\
|
|
.-.
| | Rx
| |
'-'
|
|  /
V  / LED
-  /
|
----------------0V (12V supply)

(-7V relative to microcontroller ground)

Best regards,
Spehro Pefhany
--
"it's the network..."                          "The Journey is the reward"
speff@interlog.com             Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog  Info for designers:  http://www.speff.com
```
```Spehro Pefhany <speffSNIP@interlogDOTyou.knowwhat> wrote in message news:<avgdn05bp26eo94gnuigmrsl3qhq0dn4i7@4ax.com>...
> On 20 Oct 2004 12:18:52 -0700, the renowned csembro@yahoo.com (Chuck)
> wrote:

snip

> >Last year I was driving the LED's from a simple 12V DC power supply.
> >Their cathodes are connected together and to ground.  The anodes
> >connected to appropriate resistors.

>                    x------[Rx]----|<|---- +12 (12V)
>                    |               \\\
>                    |               LED
>                    |
>               B  |/C
> -----[2K7]-------|
>                  |\E  2N2222A, 2N4401 etc.
>                    |
>                    |
> 0V (5V) -----------x----------------------- 0V (12V)
>
>
> Only tie the 12V supply ground to the 5V supply ground at one point.
> (Do not allow the LED current to flow through the 5V ground circuit).
>
> If you're using 30mA maximum, then a forced beta of 20 would imply a
> base current of 1.5mA, so 2.7K is about right.
>
> To calculate Rx, you need to know the LED forward voltage Vf. If
> you're not sure, use 2.5 for yellow or green LEDs, 3V for white or
> blue, and 2.0 for red.

snip

> Spehro Pefhany

Thanks Spehro,

Your circuit looks exactly like several others I've found on the web.
But it inspires me to ask two more questions.  How do I know what
amount of base current will drive the transistor to saturation?  Is
this what Hfe is used for?

One of my problems in design is that all the LED collectors are tied
to ground.  In order to use your design, I'll have to unsolder all my
wires and tie the anodes together instead.  Is there a way to avoid
all this rework?

Chuck
```
```On Fri, 22 Oct 2004 17:53:55 -0400, Spehro Pefhany
<speffSNIP@interlogDOTyou.knowwhat> wrote:

>This kind of setup is insensitive to loads on the collector, but very
>fussy about the base and emitter, so it's not that badly suited for
>this application if the layout is reasonable. Personally I'd rather
>slap a 1K resistor in the base, which kills the ringing or oscillation
>*and* protects the micro against faults in the driver.

Sounds good to me, sacrificing only a tiny bit of I(C) predictability for those

Jon
```
```On Fri, 22 Oct 2004 21:25:26 GMT, the renowned Jonathan Kirwan
<jkirwan@easystreet.com> wrote:

>On Fri, 22 Oct 2004 16:33:20 -0400, Spehro Pefhany
>
>>Here's a simulation I did using a 2N4401:
>>www.speff.com/emitter_follower.pdf
>

With 100 ohms (drops 2.4V at 24mA) and 10pF get continuous
oscillation.

> and what's that 180pF cap doing there???  I don't wire up things *that* bad!!

(we're talking about the OP, not *you*, of course) ;-)

Anyway, it's a 180 ohm resistor (for 24mA nominal) and 8pF shunt
capacitance. Not that out of line.

This kind of setup is insensitive to loads on the collector, but very
fussy about the base and emitter, so it's not that badly suited for
this application if the layout is reasonable. Personally I'd rather
slap a 1K resistor in the base, which kills the ringing or oscillation
*and* protects the micro against faults in the driver.

www.speff.com/with_base_resistor.pdf

```
```On Fri, 22 Oct 2004 16:33:20 -0400, Spehro Pefhany
<speffSNIP@interlogDOTyou.knowwhat> wrote:

>On Fri, 22 Oct 2004 19:39:45 GMT, the renowned Jonathan Kirwan
><jkirwan@easystreet.com> wrote:
>
>>On Thu, 21 Oct 2004 09:18:45 -0400, Spehro Pefhany
>><speffSNIP@interlogDOTyou.knowwhat> wrote:
>>
>>>It's caused by parasitic inductance in the base (for example from long
>>>wires) and parasitic capacitance across the emitter resistor. The
>>>inductance causes a negative real impedance looking into the emitter,
>>>which can cause oscillation over some range of conditions.
>>
>>I know the exact equations are a little different here, but let me try to put
>>this into grossly simplified dynamic considerations that ignore the precise
>>quantities:
>>
>>Looking at the 0V to 1.5V rising edge case, the inductance of long wires to the
>>base (I've found figures like 10 nH/cm) would limit the rate of current change
>>to (V2-v1)/L (V2 being the pin drive voltage and V1 at the base initially held
>>to zero by the BJT capacitance.)  This rising current is needed charge/discharge
>>the base-emitter and base-collector capacitances, before the transistor can
>>respond accurately.  (For simplification, I'll just say that the transistor
>>remains "OFF" until these capacitors are charged, rather than worry about the
>>exact details.)  At this point, the BJT goes into the normal region and
>>operates, driving the collector rapidly down in voltage.  This is coupled via
>>newly recharged base-collector capacitor back to the base, which now drives
>>downwards, shutting the BJT off again until the new (V/L) can again recharge the
>>BJT capacitor pair.  Etc.  This will be a damped oscillation on this rising
>>edge, an RLC thing, with the R being R1||R2 and the C being CJC+CJE?
>
>Not necessarily damped. Gory details:
>
>http://home.tiscali.be/kpmoerman/electronics/notes/efollow/efollow.htm

First thing I notice without bothering to read further is that this doesn't use
a collector resistor.  This would eliminate the R of the RLC, since I believe
that the equivalent is R1||R2 and with one of those zero, it's just LC, which
doesn't damp.

In other words, I'm still thinking my very gross simplification may still hold
here -- without having tried to read the "gory details" on the page (which I
will do.)

>>Roughly speaking, is this about it?  And if so, I'd expect a different behavior
>>on the falling edge case.
>
>The bias is different when the output is low, so it's a bit harder for
>it to oscillate.
>
>Here's a simulation I did using a 2N4401:
>www.speff.com/emitter_follower.pdf

Try adding a collector resistor and what's that 180pF cap doing there???  I
don't wire up things *that* bad!!

>With a lot more capacitance across the 180R it will oscillate
>continously, once started, even if the input goes low.
>
>In practical terms this may be an okay configuration for the purpose
>intended if layout etc. is good enough, but with a lash-up, maybe not.

Jon
```
```On Fri, 22 Oct 2004 19:39:45 GMT, the renowned Jonathan Kirwan
<jkirwan@easystreet.com> wrote:

>On Thu, 21 Oct 2004 09:18:45 -0400, Spehro Pefhany
><speffSNIP@interlogDOTyou.knowwhat> wrote:
>
>>It's caused by parasitic inductance in the base (for example from long
>>wires) and parasitic capacitance across the emitter resistor. The
>>inductance causes a negative real impedance looking into the emitter,
>>which can cause oscillation over some range of conditions.
>
>I know the exact equations are a little different here, but let me try to put
>this into grossly simplified dynamic considerations that ignore the precise
>quantities:
>
>Looking at the 0V to 1.5V rising edge case, the inductance of long wires to the
>base (I've found figures like 10 nH/cm) would limit the rate of current change
>to (V2-v1)/L (V2 being the pin drive voltage and V1 at the base initially held
>to zero by the BJT capacitance.)  This rising current is needed charge/discharge
>the base-emitter and base-collector capacitances, before the transistor can
>respond accurately.  (For simplification, I'll just say that the transistor
>remains "OFF" until these capacitors are charged, rather than worry about the
>exact details.)  At this point, the BJT goes into the normal region and
>operates, driving the collector rapidly down in voltage.  This is coupled via
>newly recharged base-collector capacitor back to the base, which now drives
>downwards, shutting the BJT off again until the new (V/L) can again recharge the
>BJT capacitor pair.  Etc.  This will be a damped oscillation on this rising
>edge, an RLC thing, with the R being R1||R2 and the C being CJC+CJE?

Not necessarily damped. Gory details:

http://home.tiscali.be/kpmoerman/electronics/notes/efollow/efollow.htm

>Roughly speaking, is this about it?  And if so, I'd expect a different behavior
>on the falling edge case.

The bias is different when the output is low, so it's a bit harder for
it to oscillate.

Here's a simulation I did using a 2N4401:
www.speff.com/emitter_follower.pdf

With a lot more capacitance across the 180R it will oscillate
continously, once started, even if the input goes low.

In practical terms this may be an okay configuration for the purpose
intended if layout etc. is good enough, but with a lash-up, maybe not.

Best regards,
Spehro Pefhany
--
"it's the network..."                          "The Journey is the reward"
speff@interlog.com             Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog  Info for designers:  http://www.speff.com
```
```On Thu, 21 Oct 2004 09:18:45 -0400, Spehro Pefhany
<speffSNIP@interlogDOTyou.knowwhat> wrote:

>It's caused by parasitic inductance in the base (for example from long
>wires) and parasitic capacitance across the emitter resistor. The
>inductance causes a negative real impedance looking into the emitter,
>which can cause oscillation over some range of conditions.

I know the exact equations are a little different here, but let me try to put
this into grossly simplified dynamic considerations that ignore the precise
quantities:

Looking at the 0V to 1.5V rising edge case, the inductance of long wires to the
base (I've found figures like 10 nH/cm) would limit the rate of current change
to (V2-v1)/L (V2 being the pin drive voltage and V1 at the base initially held
to zero by the BJT capacitance.)  This rising current is needed charge/discharge
the base-emitter and base-collector capacitances, before the transistor can
respond accurately.  (For simplification, I'll just say that the transistor
remains "OFF" until these capacitors are charged, rather than worry about the
exact details.)  At this point, the BJT goes into the normal region and
operates, driving the collector rapidly down in voltage.  This is coupled via
newly recharged base-collector capacitor back to the base, which now drives
downwards, shutting the BJT off again until the new (V/L) can again recharge the
BJT capacitor pair.  Etc.  This will be a damped oscillation on this rising
edge, an RLC thing, with the R being R1||R2 and the C being CJC+CJE?

Roughly speaking, is this about it?  And if so, I'd expect a different behavior
on the falling edge case.  Also, one could add a diode in parallel to the
emitter resistor so that the downward driven CJE of the BJT could discharge
somewhat more rapidly, at first, through that diode rather than just through the
emitter resistor?  (Not that this would impact things that much and it would
effect.)

Oh, well.  Let me know if and how I'm off the beam, here.

Thanks,
Jon
```
```On Thu, 21 Oct 2004 09:18:45 -0400, Spehro Pefhany
<speffSNIP@interlogDOTyou.knowwhat> wrote:

>It's caused by parasitic inductance in the base (for example from long
>wires) and parasitic capacitance across the emitter resistor. The
>inductance causes a negative real impedance looking into the emitter,
>which can cause oscillation over some range of conditions.

Got it!  Thanks.

Jon
```
```On Thu, 21 Oct 2004 09:18:45 -0400, Spehro Pefhany
<speffSNIP@interlogDOTyou.knowwhat> wrote:

>On Thu, 21 Oct 2004 07:46:55 GMT, the renowned Jonathan Kirwan
><jkirwan@easystreet.com> wrote:
>
>
>>drive-wise,
>
>Dynamic impedance is < 50 ohms typically with 5V Vdd. Newer chips tend
>to have better drive. It's the slope of the output voltage vs. output
>current curve on a "high" output (near Vdd).
>
>> the base side of Cbc and Cbe aren't quite as "nailed" as I might
>>imagine and I can see the ability for some oscillation.  But I think the CJC for
>>the 2n3906 is 4pF and the CJE is 8pF, so it would take something in the many
>>tens (to hundreds) of MHz, wouldn't it?
>>
>>Or is that what you were thinking?  I'd be interested to hear more on this.
>
>It's caused by parasitic inductance in the base (for example from long
>wires) and parasitic capacitance across the emitter resistor. The
>inductance causes a negative real impedance looking into the emitter,
>which can cause oscillation over some range of conditions.
>
>>>3)	If the transistor fails or is inserted incorrectly, 12V gets
>>>	back into the micro and destroys it. You can avoid this risk
>>>	(and any possible oscillation) with a small series base
>>>	resistor, yet retain the advantage of a constant current
>>> 	source.
>>
>>But at the expense of reducing the frequency of oscillation you just talked
>
>It gets rid of it entirely.

Thanks, much.  I need to set down and work through the details, myself, now.

Appreciated!

Jon
```
```On Thu, 21 Oct 2004 07:46:55 GMT, the renowned Jonathan Kirwan
<jkirwan@easystreet.com> wrote:

>drive-wise,

Dynamic impedance is < 50 ohms typically with 5V Vdd. Newer chips tend
to have better drive. It's the slope of the output voltage vs. output
current curve on a "high" output (near Vdd).

> the base side of Cbc and Cbe aren't quite as "nailed" as I might
>imagine and I can see the ability for some oscillation.  But I think the CJC for
>the 2n3906 is 4pF and the CJE is 8pF, so it would take something in the many
>tens (to hundreds) of MHz, wouldn't it?
>
>Or is that what you were thinking?  I'd be interested to hear more on this.

It's caused by parasitic inductance in the base (for example from long
wires) and parasitic capacitance across the emitter resistor. The
inductance causes a negative real impedance looking into the emitter,
which can cause oscillation over some range of conditions.

>>3)	If the transistor fails or is inserted incorrectly, 12V gets
>>	back into the micro and destroys it. You can avoid this risk
>>	(and any possible oscillation) with a small series base
>>	resistor, yet retain the advantage of a constant current
>> 	source.
>
>But at the expense of reducing the frequency of oscillation you just talked