"Moikel" <obviouslyadummy@gmail.com> skrev i meddelandet
news:1185359148.709279.38650@q75g2000hsh.googlegroups.com...
> Hi,
>
> I'm designing a microprocessor board intended to be built by students
> so that they can learn the basic principles of building such a system.
>
> The existing board that we use is based on a 68008 CPU (a description
> of this can be found here: https://www.cs.tcd.ie/Michael.Manzke/2ba4.html)
> Basically this board consists of a 68008 CPU, a ROM, two RAM ics, two
> UARTS and a CPLD which implements the Chip Select/ Memory map.
>
> We have decided to upgrade the board using an ARM processor. However,
> I am new to microcontrollers (as opposed to CPUs) and have only found
> a handful of ARM processors which feature an external bus (i.e.
> address and data pins, like on a 68k for example), namely the Atmel
> 91M series. As this board is intended as an educational tool, it is
> important that we have these lines to allow the student to manually
> implement chip select signals for the various peripherals.
>
> I was wondering if anyone has any suggestions or knows of other ARM
> chips which feature such external address/data lines. Also, could I
> use the General Purpose I/O lines which feature on ARM chips such as
> the Philips LPC210x series (http://www.nxp.com/acrobat_download/
> datasheets/LPC2101_02_03_1.pdf) to act as the address and data buses?
>
> Any replies will be appreciated.
>
> Thanks
>
You are probably better off lookin at the newer ARM9 circuits.
AT91SAM9260 is available in TQFP.
You might be better off using an existing CPU module with
the external bus coming out.
--
Best Regards,
Ulf Samuelsson
This is intended to be my personal opinion which may,
or may not be shared by my employer Atmel Nordic AB
Reply by craigm●July 26, 20072007-07-26
Mark Borgerson wrote:
> In article <5gr0tsF3hsippU1@mid.individual.net>, paul@scazon.com says...
>> Grant Edwards wrote:
>>
>> > Yikes. Building reliable wire-wrap stuff isn't as easy as it
>> > first appears. I would think it a very arcane skill to be
>> > teaching students. I haven't seen anybody do wire-wrap
>> > prototypes for about 20 years now. Making a prototype PCB is
>> > faster/simpler/cheaper.
>> >
>>
>> Not if it the main cost is the student's time. Getting a fast ARM
>> external bus to work with wire- wrap might be a challenge though. While
>> I can see where the idea comes from- they want to see them learn how to
>> select the right lines to use to interface to an external device- they'd
>> be much better off doing this as an exercise in PCB layout. Get Eagle or
>> Kicad something else free, one for each student, and give them devices
>> to interface. There are lots of devices available, so plagiarism should
>> be difficult. With a suitably designed base development board, a simple
>> connector for the bus and a small PCB made for those who get that far
>> should be feasible.
>>
>> > I'd second the suggestion of making eval/proto PCBs with
>> > breadboard areas on them.
>>
>> And wire- wrap the prototype area :)?
>
> I think you could develop a nice small pcb based on one
> of the AT91 chip that had several peripherals with
> the data bus already connected by PCB traces. You
> could then have chip selects and address lines on
> two parallel rows of wire wrap pins---one row from
> the MCU, one row from the peripherals. The students
> would then have to connect address lines and CS
> lines to implement the memory map they have set up
> in the EBI registers.
>
> Just make sure that there are appropriate weak pullups
> on all the peripheral chip selects so that unused
> peripheral devices won't clog the data bus.
>
>
> Were I designing the board for a 10-week course, I would
> have the following peripherals and excercises:
>
>
> A. Single or multi-channel UART with a FIFO and interrrupt-
> driven queue management
> B. 8-bit parallel DAC and code to output sine wave of pre-determined
> frequency based on a timer interrupt
> C. 16-bit SPI ADC connected to GPIO pins where the student has
> to write the bit-banged SPI driver. A multi-channel ADC that
> requires SPI input to select the channel would add a bit
> of spice.
>
>
> If you used the Atmel AT91R40008, with 256K of RAM, you might even
> be able to have all the student programs run from RAM and not
> even use a boot flash. The JTAG interface would remap the RAM
> and execute all the code from the RAM. Eliminating the flash
> burning step will speed up turnaround for the students.
>
> If I were designing a board like this for student use, I
> would probably add pads for an external optional boot flash,
> pads for some external power mosfets, an SD card connector,
> etc., etc. so that the board could be used to do a simple process
> controller or data logger.
>
>
> Mark Borgerson
In article <5gr0tsF3hsippU1@mid.individual.net>, paul@scazon.com says...
> Grant Edwards wrote:
>
> > Yikes. Building reliable wire-wrap stuff isn't as easy as it
> > first appears. I would think it a very arcane skill to be
> > teaching students. I haven't seen anybody do wire-wrap
> > prototypes for about 20 years now. Making a prototype PCB is
> > faster/simpler/cheaper.
> >
>
> Not if it the main cost is the student's time. Getting a fast ARM
> external bus to work with wire- wrap might be a challenge though. While
> I can see where the idea comes from- they want to see them learn how to
> select the right lines to use to interface to an external device- they'd
> be much better off doing this as an exercise in PCB layout. Get Eagle or
> Kicad something else free, one for each student, and give them devices
> to interface. There are lots of devices available, so plagiarism should
> be difficult. With a suitably designed base development board, a simple
> connector for the bus and a small PCB made for those who get that far
> should be feasible.
>
> > I'd second the suggestion of making eval/proto PCBs with
> > breadboard areas on them.
>
> And wire- wrap the prototype area :)?
I think you could develop a nice small pcb based on one
of the AT91 chip that had several peripherals with
the data bus already connected by PCB traces. You
could then have chip selects and address lines on
two parallel rows of wire wrap pins---one row from
the MCU, one row from the peripherals. The students
would then have to connect address lines and CS
lines to implement the memory map they have set up
in the EBI registers.
Just make sure that there are appropriate weak pullups
on all the peripheral chip selects so that unused
peripheral devices won't clog the data bus.
Were I designing the board for a 10-week course, I would
have the following peripherals and excercises:
A. Single or multi-channel UART with a FIFO and interrrupt-
driven queue management
B. 8-bit parallel DAC and code to output sine wave of pre-determined
frequency based on a timer interrupt
C. 16-bit SPI ADC connected to GPIO pins where the student has
to write the bit-banged SPI driver. A multi-channel ADC that
requires SPI input to select the channel would add a bit
of spice.
If you used the Atmel AT91R40008, with 256K of RAM, you might even
be able to have all the student programs run from RAM and not
even use a boot flash. The JTAG interface would remap the RAM
and execute all the code from the RAM. Eliminating the flash
burning step will speed up turnaround for the students.
If I were designing a board like this for student use, I
would probably add pads for an external optional boot flash,
pads for some external power mosfets, an SD card connector,
etc., etc. so that the board could be used to do a simple process
controller or data logger.
Mark Borgerson
Reply by Guy Macon●July 26, 20072007-07-26
rickman wrote:
>I remember well using those white plastic plug in strips in
>school. They were unreliable
Only if the user doesn't follow the instructions. Which is,
of course, pretty much a given in a school. In your own lab,
they can be quite reliable.
The main way to ruin a protoboard is to use a component lead or
wire that is bigger than the makimum allowed. This spreads the
spring contacts apart. Also bad is trimming the ends of stranded
wire so the little pieces get in the holes of the protoboard.
Avoid those abuses and run your wires cleanly and you will find
protobards to be quite reliable and a useful tool.
--
Guy Macon
<http://www.guymacon.com/>
Reply by rickman●July 26, 20072007-07-26
On Jul 26, 6:10 am, Moikel <obviouslyadu...@gmail.com> wrote:
> On Jul 25, 7:23 pm, Jonathan Kirwan <jkir...@easystreet.com> wrote:
>
> > It looks as though the course has been around for some time, so best
> > to assume that the curriculum is well worked out and you know why you
> > are making this choice. I would guess because this provides access to
> > all the bus signals with an oscilliscope, allowing them to "debug"
> > their decisions about the signals they wired for some memory map
> > arrangement. The use of a CPLD seems to merely be to convert portions
> > of a binary address into chip-selects, so that is a given for the
> > course.
>
> > So is this the reasoning why wire-wrap?
>
> Yes, the students use an oscilloscope to verify their boards as they
> build them and diagnose problems.
> They also use a Logic Analyser.
Why can't you do that with a PCB?
One reason to *not* use wire wrap is the lack of control it gives
*YOU* over the problems the students have to deal with. I remember
well using those white plastic plug in strips in school. They were
unreliable, easy to goof up and very hard to debug. It would just be
random luck as to the difficulty of the problem any given student
would be debugging or even multiple problems simultaneously.
Sometimes the difficulty debugging the problem would be too much even
for the instructor and the student would have to start all over
again. There were times that this led to complete frustration (and
very little learning) on the part of the student. Wouldn't it be
better if you had control over the issues the student were to debug so
they could deal with problems that they can learn from?
But letting them use a PCB with high speed signals, they will learn
*real* debugging techniques like how to attach a probe in a high speed
circuit so it does not distort the signal rather than obsolete skills
of attaching probes to wire wrap posts. Or with a short between power
and ground, they would learn how to use a micro-volt meter or even an
ad-hoc approach.
Like I said in my other post, you can find ways of adding problems to
their boards to be debugged as part of the course rather than letting
random chance select the nature and difficulty of their problems.
> > (My experience with wire-wrapping was mainly with roughly 1-2MHz
> > buses. Never had a problem, there, as a hobbyist in electronics. But
> > I haven't tried to wire-wrap fast buses, though I've seen such jobs
> > done by others, carefully laid out.)
> > well? How fast of a bus is appropriate for the coursework that uses
> > wire-wrapping by your students?
>
> Speed isn't really an issue. A slow bus would not be a problem.
The clock speed (or bus speed) is not the issue with wire wrap (or any
other interconnect not suited for high speed signals). The problem is
the edge rate causing ground bounce and reflections on the signal
line. Wire wrap has virtually no control over the impedance of the
wires and so it becomes impossible to design a good high speed signal
path. With many of the newer chips, the edge rates are very fast to
allow high speed signals and even if you slow the cycle rate, you
still have the fast edges which cause the problems. For example, on
static RAMs and similar logic, the chip enable is a clock that strobes
the data into the chip on write. If the rising or falling edges
bounce (or ring) you get double clocking, potentially of the wrong
data. Likewise, if the data or worse, address lines bounce, you get
the wrong data or the wrong address.
The 68008 was in use at a time when edge rates were very suited for
wire wrap and signal integrity was not a common term. Now nearly
every MCU memory bus has fast edge rates and requires careful control
of impedance and length.
In fact, last summer I took a course in high speed signal design and I
learned more useful info than the entire time I was in college. Lee
Ritchey is a true expert on the topic and explores the subject in
theory, simulation and practice. I have never attended a class that
covered the subject matter so thoroughly and was more convincing in
the results, not to mention the utility of the information. Anything
you can do to prepare your students for the practicality of designing
high speed signals would be remembered (and used) by them for their
entire careers.
Reply by Jim Granville●July 26, 20072007-07-26
Moikel wrote:
> On Jul 25, 7:23 pm, Jonathan Kirwan <jkir...@easystreet.com> wrote:
>
>
>
>>It looks as though the course has been around for some time, so best
>>to assume that the curriculum is well worked out and you know why you
>>are making this choice. I would guess because this provides access to
>>all the bus signals with an oscilliscope, allowing them to "debug"
>>their decisions about the signals they wired for some memory map
>>arrangement. The use of a CPLD seems to merely be to convert portions
>>of a binary address into chip-selects, so that is a given for the
>>course.
>>
>>So is this the reasoning why wire-wrap?
>
>
> Yes, the students use an oscilloscope to verify their boards as they
> build them and diagnose problems.
> They also use a Logic Analyser.
>
>
>
>>(My experience with wire-wrapping was mainly with roughly 1-2MHz
>>buses. Never had a problem, there, as a hobbyist in electronics. But
>>I haven't tried to wire-wrap fast buses, though I've seen such jobs
>>done by others, carefully laid out.)
>
>
>>well? How fast of a bus is appropriate for the coursework that uses
>>wire-wrapping by your students?
>
>
> Speed isn't really an issue. A slow bus would not be a problem.
http://www.zilog.com/products/partdetails.asp?id=eZ80F917050SBC
This one has a similar BUS to the 68008, and is typical of the
Modules you can get.
[I know it does not have an ARM core, but this can use any 8 bit
peripherals you already have ]
Connections are on 0.1" headers. Looks to be about the same area
as a business card.
I have not seen a price yet.
-jg
Reply by Moikel●July 26, 20072007-07-26
On Jul 25, 7:23 pm, Jonathan Kirwan <jkir...@easystreet.com> wrote:
> It looks as though the course has been around for some time, so best
> to assume that the curriculum is well worked out and you know why you
> are making this choice. I would guess because this provides access to
> all the bus signals with an oscilliscope, allowing them to "debug"
> their decisions about the signals they wired for some memory map
> arrangement. The use of a CPLD seems to merely be to convert portions
> of a binary address into chip-selects, so that is a given for the
> course.
>
> So is this the reasoning why wire-wrap?
Yes, the students use an oscilloscope to verify their boards as they
build them and diagnose problems.
They also use a Logic Analyser.
> (My experience with wire-wrapping was mainly with roughly 1-2MHz
> buses. Never had a problem, there, as a hobbyist in electronics. But
> I haven't tried to wire-wrap fast buses, though I've seen such jobs
> done by others, carefully laid out.)
> well? How fast of a bus is appropriate for the coursework that uses
> wire-wrapping by your students?
Speed isn't really an issue. A slow bus would not be a problem.
Reply by Paul Burke●July 26, 20072007-07-26
Grant Edwards wrote:
> Yikes. Building reliable wire-wrap stuff isn't as easy as it
> first appears. I would think it a very arcane skill to be
> teaching students. I haven't seen anybody do wire-wrap
> prototypes for about 20 years now. Making a prototype PCB is
> faster/simpler/cheaper.
>
Not if it the main cost is the student's time. Getting a fast ARM
external bus to work with wire- wrap might be a challenge though. While
I can see where the idea comes from- they want to see them learn how to
select the right lines to use to interface to an external device- they'd
be much better off doing this as an exercise in PCB layout. Get Eagle or
Kicad something else free, one for each student, and give them devices
to interface. There are lots of devices available, so plagiarism should
be difficult. With a suitably designed base development board, a simple
connector for the bus and a small PCB made for those who get that far
should be feasible.
> I'd second the suggestion of making eval/proto PCBs with
> breadboard areas on them.
And wire- wrap the prototype area :)?
Paul Burke
Reply by Jim Granville●July 25, 20072007-07-25
Moikel wrote:
> On Jul 25, 12:54 pm, Jim Granville <no.s...@designtools.maps.co.nz>
> wrote:
>
>
>>Wasn't the 68008 in a giant DIP package ?
>
>
> Yes
>
>
>>So you expect the students to SOLDER this device, as they build the
>>boards ? EBI ARMs have fine-pitch packages!
>
>
> No, we will be sending the components away to be mounted on wire wrap
> sockets. Everything
> will be wire wrap
That opens up a wide choice of devices, but taking this flow,
you would surely be better using a small commercial module ?
Those come with full documentation, and are populated, and
decoupled.
ST do a nice USB key, with an ARM9 core
>
>>The 68008 was 8 bits IIRC, so why not something like an 80C51 ?
>
>
> It is important that we use the ARM instruction set.
>
> Thanks for the reply
Unlike the 68008, the peripherals are now mostly on-chip,
so 'chip selects' are not so relevant.
You CAN setup external device interfaces using SPI,
and that is a mor eup to date design approach.
The 680008 HAD no choice but external memory, today's
uC have the CODE and DATA on-chip, many peripherals,
so it's only 'special' case peripherals that need external
access, and for those, a 10+MHz SPI link is usually fine.
A keypad/LCD daughter card, that used a CPLD (or Logic), would
give the students something to assemble, and you would
interface that via the SPI port.
-jg
Reply by Jonathan Kirwan●July 25, 20072007-07-25
On Wed, 25 Jul 2007 08:53:05 -0700, Moikel <obviouslyadummy@gmail.com>
wrote:
>On Jul 25, 12:54 pm, Jim Granville <no.s...@designtools.maps.co.nz>
>wrote:
>
>> Wasn't the 68008 in a giant DIP package ?
>
>Yes
>
>> So you expect the students to SOLDER this device, as they build the
>> boards ? EBI ARMs have fine-pitch packages!
>
>No, we will be sending the components away to be mounted on wire wrap
>sockets. Everything will be wire wrap
It looks as though the course has been around for some time, so best
to assume that the curriculum is well worked out and you know why you
are making this choice. I would guess because this provides access to
all the bus signals with an oscilliscope, allowing them to "debug"
their decisions about the signals they wired for some memory map
arrangement. The use of a CPLD seems to merely be to convert portions
of a binary address into chip-selects, so that is a given for the
course.
So is this the reasoning why wire-wrap?
(My experience with wire-wrapping was mainly with roughly 1-2MHz
buses. Never had a problem, there, as a hobbyist in electronics. But
I haven't tried to wire-wrap fast buses, though I've seen such jobs
done by others, carefully laid out.)
>> The 68008 was 8 bits IIRC, so why not something like an 80C51 ?
>
>It is important that we use the ARM instruction set.
Okay. It's a decision, then. Is this about software tools as well as
market changes?
Are you willing to switch to a wider data bus for wire-wrapping, as
well? How fast of a bus is appropriate for the coursework that uses
wire-wrapping by your students?
Jon