Reply by Martin Griffith●November 4, 20072007-11-04
On Sun, 4 Nov 2007 22:09:43 +0100, in comp.arch.embedded "Electric"
<ElectricL@Electric.Electric> wrote:
>Thank you all for your input :-)
no probs.
It's nice to try and help, but choose a better/personal nickname, if
you are going to use newsgroups more often
Martin
Reply by Joerg●November 4, 20072007-11-04
Steve Underwood wrote:
> Tim Wescott wrote:
>> On Sat, 03 Nov 2007 08:40:43 -0700, Joerg wrote:
>>
>>> Electric wrote:
>>>> "Randy Yates" <yates@ieee.org> writes:
>>>>
>>>>
>>>>> But to be sure, compute the output impedance explicitly. Form a
>>>>> small-signal equivalent circuit model of the BP filter circult. You
>>>>> can
>>>>> do this using the ideal op-amp model, i.e., no current flows into the
>>>>> inputs and the positive and negative inputs are maintained at the same
>>>>> levels. Then short the (voltage) input and compute the output
>>>>> impedance
>>>>> by connecting a fictitious "test source" V_x at the output and
>>>>> determining the output current I_x that would flow into the output
>>>>> (back
>>>>> into the BP circuit). The output impedance is then V_x / I_x.
>>>>>
>>>>> Armed with the knowledge of the output impedance, find the input
>>>>> impedance of the ADC on the datasheet. It should be at least a
>>>>> factor of
>>>>> 10 (the higher the better) more than the output impedance of your
>>>>> circuit.
>>>> Thank you, I will try to do that. :-)
>>>>
>>> Just keep in mind that some ADCs chrage/discharge an on-chip cap that
>>> hangs right across the input. The driving stage must then be up to
>>> snuff to deal with that.
>>>
>>
>> The ones that do that will tell you in the data sheets, and they'll tell
>> you what level of charge injection you can expect when the ADC
>> samples. What your filter/amplifier _really_ needs to do is to have
>> that cap at the
>> right voltage when the next sample commences.
>>
>> The way that I've seen this done is to model the cap and the charge
>> injection, then make sure that the filter/buffer settles to within the
>> ADC's ENOB error within the ADC sample time -- plus a bit or two to
>> accommodate the inevitable loss of precision when you go from mathemagic
>> land to the real world.
>>
> Unless its a sigma-delta converter, or has explicit anti-alias filtering
> or buffer amps on board, pretty much any converter applies a god awful
> kick as the sampling gate opens. You not only need to ensure the output
> impedance of the filter is low enough for the sampling to settle to the
> required resolution within the gate time, you need to ensure those kicks
> don't destabilise the analogue circuitry you are adding. I've seen amps
> go kinda wacky when they are connected to an ADC.
>
> People can be really woolly about the performance envelope of the things
> which drive ADC inputs, whether passive or active.
>
Yep. It's one of my bread and butter jobs. My recipe is to never, ever,
split ground planes. Ever. That plus a nice stiff low-Z drive has always
yielded the performance the clients wanted. Before the design change
they often had 2-3 bits worth or "weirdness" in the data. For those with
ground splits the data looked like Niagara falls.
--
Regards, Joerg
http://www.analogconsultants.com/
Reply by Electric●November 4, 20072007-11-04
Thank you all for your input :-)
Reply by Martin Griffith●November 4, 20072007-11-04
On Sat, 3 Nov 2007 10:49:38 +0100, in comp.arch.embedded "Electric"
<ElectricL@Electric.Electric> wrote:
>I have an BP-active filter with one op amp as a driver stage for an ADC. Is
>this good or bad, should Ihave a voltage follower (op amp) between them?
>
>The active BP-filter serves as a selective filter and an anti alias filter.
>
>
Reply by Steve Underwood●November 4, 20072007-11-04
Tim Wescott wrote:
> On Sat, 03 Nov 2007 08:40:43 -0700, Joerg wrote:
>
>> Electric wrote:
>>> "Randy Yates" <yates@ieee.org> writes:
>>>
>>>
>>>> But to be sure, compute the output impedance explicitly. Form a
>>>> small-signal equivalent circuit model of the BP filter circult. You can
>>>> do this using the ideal op-amp model, i.e., no current flows into the
>>>> inputs and the positive and negative inputs are maintained at the same
>>>> levels. Then short the (voltage) input and compute the output impedance
>>>> by connecting a fictitious "test source" V_x at the output and
>>>> determining the output current I_x that would flow into the output (back
>>>> into the BP circuit). The output impedance is then V_x / I_x.
>>>>
>>>> Armed with the knowledge of the output impedance, find the input
>>>> impedance of the ADC on the datasheet. It should be at least a factor of
>>>> 10 (the higher the better) more than the output impedance of your
>>>> circuit.
>>> Thank you, I will try to do that. :-)
>>>
>> Just keep in mind that some ADCs chrage/discharge an on-chip cap that
>> hangs right across the input. The driving stage must then be up to snuff
>> to deal with that.
>>
>
> The ones that do that will tell you in the data sheets, and they'll tell
> you what level of charge injection you can expect when the ADC samples.
> What your filter/amplifier _really_ needs to do is to have that cap at the
> right voltage when the next sample commences.
>
> The way that I've seen this done is to model the cap and the charge
> injection, then make sure that the filter/buffer settles to within the
> ADC's ENOB error within the ADC sample time -- plus a bit or two to
> accommodate the inevitable loss of precision when you go from mathemagic
> land to the real world.
>
Unless its a sigma-delta converter, or has explicit anti-alias filtering
or buffer amps on board, pretty much any converter applies a god awful
kick as the sampling gate opens. You not only need to ensure the output
impedance of the filter is low enough for the sampling to settle to the
required resolution within the gate time, you need to ensure those kicks
don't destabilise the analogue circuitry you are adding. I've seen amps
go kinda wacky when they are connected to an ADC.
People can be really woolly about the performance envelope of the things
which drive ADC inputs, whether passive or active.
Regards,
Steve
Reply by Didi●November 3, 20072007-11-03
> The way that I've seen this done is to model the cap and the charge
> injection, then make sure that the filter/buffer settles to within the
> ADC's ENOB error within the ADC sample time -- plus a bit or two to
> accommodate the inevitable loss of precision when you go from mathemagic
> land to the real world.
The most straight forward way to compensate for charge injection is
to use an RC-filter as the last stage of the antialiasing filter,
C being high enough to absorb the injected charge within < 1 LSB or so
and tied directly to the ADC input.
At higher speeds this might mean too low an R, but not in
real life since the high-speed ADCs (those where this would be an
issue) don't inject any charge into the input (at least those
I have used and looked at).
Dimiter
------------------------------------------------------
Dimiter Popoff Transgalactic Instruments
http://www.tgi-sci.com
------------------------------------------------------
On Nov 3, 7:12 pm, Tim Wescott <t...@seemywebsite.com> wrote:
> On Sat, 03 Nov 2007 08:40:43 -0700, Joerg wrote:
> > Electric wrote:
>
> >> "Randy Yates" <ya...@ieee.org> writes:
>
> >>> But to be sure, compute the output impedance explicitly. Form a
> >>> small-signal equivalent circuit model of the BP filter circult. You can
> >>> do this using the ideal op-amp model, i.e., no current flows into the
> >>> inputs and the positive and negative inputs are maintained at the same
> >>> levels. Then short the (voltage) input and compute the output impedance
> >>> by connecting a fictitious "test source" V_x at the output and
> >>> determining the output current I_x that would flow into the output (back
> >>> into the BP circuit). The output impedance is then V_x / I_x.
>
> >>> Armed with the knowledge of the output impedance, find the input
> >>> impedance of the ADC on the datasheet. It should be at least a factor of
> >>> 10 (the higher the better) more than the output impedance of your
> >>> circuit.
>
> >> Thank you, I will try to do that. :-)
>
> > Just keep in mind that some ADCs chrage/discharge an on-chip cap that
> > hangs right across the input. The driving stage must then be up to snuff
> > to deal with that.
>
> The ones that do that will tell you in the data sheets, and they'll tell
> you what level of charge injection you can expect when the ADC samples.
> What your filter/amplifier _really_ needs to do is to have that cap at the
> right voltage when the next sample commences.
>
> The way that I've seen this done is to model the cap and the charge
> injection, then make sure that the filter/buffer settles to within the
> ADC's ENOB error within the ADC sample time -- plus a bit or two to
> accommodate the inevitable loss of precision when you go from mathemagic
> land to the real world.
>
> --
> Tim Wescott
> Control systems and communications consultinghttp://www.wescottdesign.com
>
> Need to learn how to apply control theory in your embedded system?
> "Applied Control Theory for Embedded Systems" by Tim Wescott
> Elsevier/Newnes,http://www.wescottdesign.com/actfes/actfes.html
Reply by robert bristow-johnson●November 3, 20072007-11-03
On Nov 3, 10:25 am, husterk <hust...@gmail.com> wrote:
> On Nov 3, 5:49 am, "Electric" <Electr...@Electric.Electric> wrote:
>
> > I have an BP-active filter with one op amp as a driver stage for an ADC. Is
> > this good or bad, should Ihave a voltage follower (op amp) between them?
>
> > The active BP-filter serves as a selective filter and an anti alias filter.
>
> I really depends on the output swing from your BP filter and the type
> of ADC that you are using.
that and what everybody else said. i would also think you wouldn't
need to use a voltage follower between your BPF op-amp and the A/D as
long as there are not passive components in between (the BPF has all
of its compenents in the input and feedback of the op-amp).
the other thing i would say is keep in mind, in the signal processing
that occurs after the A/D that it's on a filtered signal and not the
flat one, in case you need to compensate for that somehow internally
in the DSP. usually this is only the case when an anti-aliasing
filter is a little too aggressive at the high end of the passband
(below Nyquist) taht you wanna keep. perhaps in the OP's case he
doesn't *want* to bring back anything that the BPF attenuated. i
dunno.
r b-j
Reply by Tim Wescott●November 3, 20072007-11-03
On Sat, 03 Nov 2007 08:40:43 -0700, Joerg wrote:
> Electric wrote:
>>
>> "Randy Yates" <yates@ieee.org> writes:
>>
>>
>>> But to be sure, compute the output impedance explicitly. Form a
>>> small-signal equivalent circuit model of the BP filter circult. You can
>>> do this using the ideal op-amp model, i.e., no current flows into the
>>> inputs and the positive and negative inputs are maintained at the same
>>> levels. Then short the (voltage) input and compute the output impedance
>>> by connecting a fictitious "test source" V_x at the output and
>>> determining the output current I_x that would flow into the output (back
>>> into the BP circuit). The output impedance is then V_x / I_x.
>>>
>>> Armed with the knowledge of the output impedance, find the input
>>> impedance of the ADC on the datasheet. It should be at least a factor of
>>> 10 (the higher the better) more than the output impedance of your
>>> circuit.
>>
>> Thank you, I will try to do that. :-)
>>
>
> Just keep in mind that some ADCs chrage/discharge an on-chip cap that
> hangs right across the input. The driving stage must then be up to snuff
> to deal with that.
>
The ones that do that will tell you in the data sheets, and they'll tell
you what level of charge injection you can expect when the ADC samples.
What your filter/amplifier _really_ needs to do is to have that cap at the
right voltage when the next sample commences.
The way that I've seen this done is to model the cap and the charge
injection, then make sure that the filter/buffer settles to within the
ADC's ENOB error within the ADC sample time -- plus a bit or two to
accommodate the inevitable loss of precision when you go from mathemagic
land to the real world.
--
Tim Wescott
Control systems and communications consulting
http://www.wescottdesign.com
Need to learn how to apply control theory in your embedded system?
"Applied Control Theory for Embedded Systems" by Tim Wescott
Elsevier/Newnes, http://www.wescottdesign.com/actfes/actfes.html
Reply by Joerg●November 3, 20072007-11-03
Electric wrote:
>
> "Randy Yates" <yates@ieee.org> writes:
>
>
>> But to be sure, compute the output impedance explicitly. Form a
>> small-signal equivalent circuit model of the BP filter circult. You can
>> do this using the ideal op-amp model, i.e., no current flows into the
>> inputs and the positive and negative inputs are maintained at the same
>> levels. Then short the (voltage) input and compute the output impedance
>> by connecting a fictitious "test source" V_x at the output and
>> determining the output current I_x that would flow into the output (back
>> into the BP circuit). The output impedance is then V_x / I_x.
>>
>> Armed with the knowledge of the output impedance, find the input
>> impedance of the ADC on the datasheet. It should be at least a factor of
>> 10 (the higher the better) more than the output impedance of your
>> circuit.
>
> Thank you, I will try to do that. :-)
>
Just keep in mind that some ADCs chrage/discharge an on-chip cap that
hangs right across the input. The driving stage must then be up to snuff
to deal with that.
--
Regards, Joerg
http://www.analogconsultants.com/
Reply by Electric●November 3, 20072007-11-03
"Randy Yates" <yates@ieee.org> writes:
> But to be sure, compute the output impedance explicitly. Form a
> small-signal equivalent circuit model of the BP filter circult. You can
> do this using the ideal op-amp model, i.e., no current flows into the
> inputs and the positive and negative inputs are maintained at the same
> levels. Then short the (voltage) input and compute the output impedance
> by connecting a fictitious "test source" V_x at the output and
> determining the output current I_x that would flow into the output (back
> into the BP circuit). The output impedance is then V_x / I_x.
>
> Armed with the knowledge of the output impedance, find the input
> impedance of the ADC on the datasheet. It should be at least a factor of
> 10 (the higher the better) more than the output impedance of your
> circuit.