Reply by Matti Ruusunen●November 6, 20022002-11-06
Hello,
back to basics.
Have you tried to replace the tantalum cap with a ceramic? I tried to peek on my
reference board ('449 and '149) and there're 16V and 10V.. the
first one being a bit high.
FYI, these beasts leak - the more the bigger is the difference between the
cap's tolerance and real voltage. Particularly, if you don't need high
accuracy ADC the high capacity cap is an overkill.
greetings,
Matti
-----Alkupernen viesti-----
Lett rothe957 [mailto:rothe@roth...]
Letetty: 30. lokakuuta 2002 11:47
Hi!
--- In msp430@y..., "reich_wolfgang" <reich_wolfgang@y...>
wrote:
> I don't know which ports you are using on
your F149, but you can
> switch off the input stages of Port P2. The associated register is
> named CAPD... The same might be true for P6...
Thanks for the pointers. Currently I am using P1 for the datalines,
P2.0 for ACLK output, and P4.5 and P4.6 for the control lines.
P1 and the P4 pins were chosen for layout considerations.
P2 is not available (I need COMP_A), so I will try to use
P6 instead of P1.
with best regards,
Michael
Hi!
--- In msp430@y..., "reich_wolfgang" <reich_wolfgang@y...>
wrote:
> I don't know which ports you are using on
your F149, but you can
> switch off the input stages of Port P2. The associated register is
> named CAPD... The same might be true for P6...
Thanks for the pointers. Currently I am using P1 for the datalines,
P2.0 for ACLK output, and P4.5 and P4.6 for the control lines.
P1 and the P4 pins were chosen for layout considerations.
P2 is not available (I need COMP_A), so I will try to use
P6 instead of P1.
with best regards,
Michael
Reply by reich_wolfgang●October 29, 20022002-10-29
> This works, but of course if the I/O pin is switched to input
> (display logic 0 output), the I/O sees Vcc/2...
which causes
> the excess current.
There might be a solution for your "inputs at Vcc/2" problem:
I don't know which ports you are using on your F149, but you can
switch off the input stages of Port P2. The associated register is
named CAPD.
See MSPx1xx Users Guide (slau049b): "14.3.3 Comparator_A, Port
Disable Register CAPD" and "14.1.1 Analog Signals at Digital
Inputs".
Search for "CAPD" in the datasheet (slas272c).
The same might be true for P6 (which can be ADC inputs): if you
switch them to "Module Function" with P6SEL, the input stage should
be switched off. Didn't check this.
See "input/output schematic" for port P6 on page 64 of the mentioned
datasheet.
Hope this helps!
Reply by rothe957●October 28, 20022002-10-28
Hi!
--- In msp430@y..., "CP" <cp8071@y...> wrote:
> To get that kind of stand-by power I'm
guessing that
> you're switching the LCD VCC off?
I my first reply I said the display will be on all the time,
but now, after changing to 2M resistors I still measure
about 25uA. 12uA go into the display, 9 uA go into the resistors,
1uA for the opamp, and 3uA for the 'F149 in LPM3.
25uA gives only 275 days battery life. Too short.
If I switch off display power, all but the 'F149 is off.
At that rate, the battery would last more than 6 years...
Maybe I should implement a configurable power save option,
something like: display always on between 7am and 11pm
(both times configurable), and in the rest of the time
turn it on at a button press and leave it on for 1 minute
or so after last button release...
This could bring battery life to well over a year,
depending on the daily 'on' interval duration,
without impairing usability too much.
Thanks for the idea!
Reply by rothe957●October 24, 20022002-10-24
Hi!
> r> Using a DC/DC converter is also no option,
because
> r> the overall power consumption must be less than 20uA in order
> r> to get a decent battery life from a 165mAh CR2325 cell.
> look at this DC/DC from TI
> TPS60210,Regulated 3.3-V 100-mA Low-Ripple Charge Pump
> *UltraLow Operating Current in Snooze Mode,
> Typical 2 uA with up to 2mA Output Current
Wow. Nice. This would allow to keep the system voltage at
3.3V until the end of battery life. This way I could run the
MSP430 at Vcc/2=1.65V all the time. Could get a little close
to Vpor at low temperature, but will probably be ok.
However, the main problem is that by construction in a watch
battery+ is the real 'ground', case, display, beeper, and
everything is directly connected to the battery+.
I would need a 'negative' version of the 60210 to be
compatible with the watch mainboard. And even then remains
the problem of getting all the capacitors in, even reusing
the ones that are already there.
But thanks for the suggestion anyway, this TPS60210 is a
very interesting device.
with best regards,
Michael Rothe
Reply by Valeriy Kozhevnikov●October 24, 20022002-10-24
HI rothe957,
r> Using a DC/DC converter is also no option, because
r> the overall power consumption must be less than 20uA in order
r> to get a decent battery life from a 165mAh CR2325 cell.
look at this DC/DC from TI
TPS60210,Regulated 3.3-V 100-mA Low-Ripple Charge Pump with Ultra Low Operating
Current
FEATURES
*Regulated 3.3-V Output Voltage From a 1.8-V to 3.6-V Input Voltage Range
*UltraLow Operating Current in Snooze Mode, Typical 2 uA With up to 2-mA Output
Current
*Less Than 5-mV(PP) Output Voltage Ripple Achieved With Push-Pull Topology
*Integrated Low-Battery and Power-Good Detector
*Switching Frequency Can Be Synchronized to External Clock Signal
*Extends Battery Usage With up to 90% Efficiency and 35-uA Quiescent Current
*Easy-To-Design, Low Cost, Low EMI Power Supply Since No Inductors Are Used
*Compact Converter Solution in UltraSmall 10-Pin MSOP With Only Four External
Capacitors Required
--
Valeriy
--- In msp430@y..., "Kris De Vos" <microbit@c...> wrote:
> This is a really interesting problem .........
> Do you think the display uses a "floating
Vcc/2 GND"
> to create the bias voltages for the LCD, having
> possibly 2 backplanes ?
Could be. The problem is, I have very little data.
The display is part of a Seiko watch from around 1983.
All I know about the display is what I could measure on
the original watch.
See here: http://www.sigma957.org/uc_pinout.html
The original CPU generated Vbatt/2 with a switched capacitor.
The CPU itself probably ran from Vbatt/2.
The interface to the display controller (a 3 chip solution)
consists of a 8bit data bus, 2 strobes and a 32768 Hz clock feed.
The L-level on all these lines is Vbatt/2, the H-level is Vbatt.
I used a digital scope and a logic analyzer to figure
out how the CPU talks to the display.
Because I know nothing about the display controller
(the protocol is very different from common LCD controllers,
see here: http://www.sigma957.org/uc_lcd.html),
I want to reproduce the behavior of the original CPU as
good as possible. This means generating Vbatt/2 and using
this as logic L-level.
Vbatt in a watch starts at about 3.4V with a fresh battery,
and goes down to 2.2V when the battery is almost empty.
Running the MSP430F149 from Vbatt/2 is therefore not a viable
option. Using a DC/DC converter is also no option, because
the overall power consumption must be less than 20uA in order
to get a decent battery life from a 165mAh CR2325 cell.
Because ACLK output is the module function of Pin 2.0,
it is always active H or L. I tried driving the display clock
with MSP430 L-level (-Vbatt/2 for the display) via a 1M series
resistor, but the display controller has clamp diodes at the
inputs and malfunctions with a 'negative' input voltage.
So I used a serial diode and a 1M pull-down to Vbatt/2, and
this works, but driving H means 1.5uA current trough the
resistor.
For the 8 data lines and 2 strobes, I had the idea of using
only the pull-downs, and switch the I/Os to 'H-out' for H-level
and 'input' (=tristate, I thought) for L-level (via pull-down).
> Is there a state on the controller that leaves the
8 data
> lines as "input", so you can define your I/O as outputs
> when they're static in LPM3?
All lines of the controller are always inputs.
The strobes are L active, so I have to keep them at H level
most of the time. Another 3uA. Maybe I should try 2M here,
but the H-L edge would become an even slower slope...
But still worth a try.
For the data lines, their level is unimportant while the
strobe lines are H. So I thought setting them to tristate/input
would be the best idea, but this turned out to be a mistake.
Setting them to H-output means another 8 x Ipulldown.
But with 2MOhms this should be bearable.
> Probably sounds nuts, but the LCD segment outputs
of a F4XX part could
> "mimic" a GND - Vcc/2 - Vcc output state.
> Leaving it static would be the trick of course, along with creating the
right 8 bit settings
> out of the 8 LCD segment I/O lines.......
Nice idea. But I don't think this is feasible. Because they
cannot be programmed to only assume Vcc and Vcc/2 level and
never GND level. And -Vbatt/2 on any logic input will generate
clamp currents and probably latch-up in the display controller.
> The only other way would be for the F14X to
actually have its own GND at the Vcc/2, but then
> the CPU would run at say 3.3 V / 2 = 1.65 Volts.
When the battery is full. If it is near empty: 2.2V/2 = 1.1V.
No, I think I'll stick to running the uC on Vbatt, generating
Vbatt/2 via a micropower opamp (MAX4470, 0.75uA, works down to 1.8V),
and putting a few 0804 (4 x 0402) size resistor arrays on the PCB.
Oh, BTW, are there any current figures for flash selfprogramming?
Reply by Kris De Vos●October 24, 20022002-10-24
This is a really interesting problem .........
Do you think the display uses a "floating Vcc/2 GND" to create the
bias
voltages for the LCD, having possibly 2 backplanes ?
Is there a state on the controller that leaves the 8 data lines as
"input", so
you can define your I/O as outputs when they're static in LPM3 ?
Probably sounds nuts, but the LCD segment outputs of a F4XX part could
"mimic" a GND - Vcc/2 - Vcc output state.
Leaving it static would be the trick of course, along with creating the right 8
bit settings
out of the 8 LCD segment I/O lines.......
What actually constitues a logic "1" and logic "0" on the 8
data lines ?
The only other way would be for the F14X to actually have its own GND at the
Vcc/2, but then
the CPU would run at say 3.3 V / 2 = 1.65 Volts.
At such a low clock, you can easily use the lowest core voltage, but < 1.8
Volts of course is
not guaranteed... (Then again, I aasume you're not planning on making
100,000 of these units.
Still a good challenge.. !
There's other solutions, but they won't fit becuase of form factor.
----- Original Message -----
From: rothe957
To: msp430@msp4...
Sent: Friday, October 25, 2002 2:12 AM
Subject: [msp430] Re: MSP430 LPM3 power consumption
> Does anyone know another solution than diodes?
I thought about it a little and tried a single diode in
the connection from vcc/2 to the 11 pull-down resistors.
This way, the inputs see Vcc/2 + Vf, but the 0 level for
the display also goes up by Vf. The display still works,
and the total current went down to about 25uA.
Then it occured to me that if I leave the data lines
at active high, I'll have no input problems (except for
the few microseconds when I actually have to generate a 0),
but the steady current from the 8 pull-downs instead.
Give it a try - we are down to 15uA now.
Maybe I should try 2M for the data pull downs, this could
win me another 4 or 5 uA...
.
Reply by CP●October 24, 20022002-10-24
I've been reading along with you on this. It looks like you're
using
an external LCD module. To get that kind of stand-by power I'm
guessing that you're switching the LCD VCC off? Also, is this a 5V
or 3V LCD/LCD Controller? On-board parts or Off-the-Shelf module?
CP
--- In msp430@y..., "rothe957" <rothe@d...> wrote:
> > Does anyone know another solution than
diodes?
>
> I thought about it a little and tried a single diode in
> the connection from vcc/2 to the 11 pull-down resistors.
> This way, the inputs see Vcc/2 + Vf, but the 0 level for
> the display also goes up by Vf. The display still works,
> and the total current went down to about 25uA.
> Then it occured to me that if I leave the data lines
> at active high, I'll have no input problems (except for
> the few microseconds when I actually have to generate a 0),
> but the steady current from the 8 pull-downs instead.
> Give it a try - we are down to 15uA now.
> Maybe I should try 2M for the data pull downs, this could
> win me another 4 or 5 uA...
