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High-Speed Digital RF Signal Acquisition and Visualization System

A prototype RF digital oscilloscope for capturing and displaying RF waveforms.

Advanced Project — This is advanced because it combines high-speed ADC capture, low-jitter clocking, RF front-end design, and tight PCB/layout constraints that are much harder than a typical MCU sensor project.
Assumptions:
  • The user wants a benchtop-style prototype, not a handheld battery-powered instrument.
  • The scope is intended for RF signals in the low-to-mid hundreds of MHz range, so a fast ADC and clean clocking matter more than ultra-low power.
  • A PC or external display is acceptable for initial prototyping, but a local display is still useful for standalone operation.
  • This is a prototype, so using a dev board plus high-speed ADC/front-end modules is acceptable even if it is not a production-optimized architecture.

Bill of Materials

Microcontroller
Top Pick ESP32-S3-WROOM-1 Espressif Systems From our database
Top pick: ESP32-S3-WROOM-1 (Espressif Systems). Easy prototype platform with USB, plenty of GPIO, and decent processing for UI/control tasks. Useful if you want WiFi for streaming captured waveforms, though it is not as strong as an STM32H7 for deterministic high-speed acquisition.
Dev Board ABX00074 Arduino
Ready-to-use board for prototyping with this chip
STM32H743VIT6 STMicroelectronics From our database
Cortex-M7 class MCU with strong DMA, high clock rate, and enough memory/peripheral bandwidth to coordinate a fast external ADC, trigger logic, and waveform processing. Good fit for FFT and acquisition control in a prototype RF scope.
Raspberry Pi Pico 2 Raspberry Pi
Low-cost, easy-to-use dual-core MCU board for control and UI prototyping. Good for simpler acquisition control, but less ideal than an STM32H7 for heavy DSP and tight timing.
RF Front-End Amplifier
Top Pick ZFL-1000LN+ Mini-Circuits From our database
ZFL-1000LN+ is the easiest prototype choice because it is a ready-made SMA module with wideband coverage and low-noise gain, which reduces front-end integration risk.
PGA-103+ Mini-Circuits From our database
High-dynamic-range broadband gain block covering 50 MHz to 4 GHz, which is attractive for RF scope front ends. Good choice when you want a simple, compact amplifier with strong linearity across a wide RF range.
GALI-84+ Mini-Circuits From our database
Broadband small-signal RF amplifier suitable for compact front-end gain stages. Useful when you want a simple gain block, but it is less directly convenient than the module-style options for a first prototype.
ADC
Top Pick AD9643 Analog Devices From our database
Top pick: AD9643 (Analog Devices). Dual-channel 14-bit ADC up to 170 MSPS per channel, useful if you want two synchronized channels or a simpler acquisition rate target. Good balance of resolution and speed for midrange RF work.
AD9280 Analog Devices From our database
8-bit high-speed ADC that is easier to interface and can be enough for basic RF waveform viewing. Lower resolution than the other options, but simpler and often cheaper for a first proof of concept.
Clock Generator
Top Pick SI5338A-B-GM Silicon Labs From our database
Top pick: SI5338A-B-GM (Silicon Labs). Very flexible I2C-programmable clock generator with multiple outputs up to 710 MHz. Easier to configure in a prototype than a more specialized clock tree, though not as purpose-built for ultra-low-jitter converter clocking as the TI parts.
Power Supply
If you want a simple modern input, an alternative part is useful for USB-C PD power entry. If you need cleaner rails for the ADC and clock, pair a buck like TPS54302DDCR with a low-noise LDO such as TPS7A4700RGWT.
TPS54302DDCR Texas Instruments AI suggestion - verify availability
Compact synchronous buck regulator suitable for generating local rails from a higher-voltage input. Good for powering analog and digital subsystems efficiently in a prototype.
TPS7A4700RGWT Texas Instruments AI suggestion - verify availability
Low-noise LDO that is useful for sensitive analog rails and clock circuitry. Helps reduce supply noise that can degrade RF capture quality.
Display
Top Pick ILI9341 2.4in SPI TFT module Generic AI suggestion - verify availability
ILI9341 2.4in SPI TFT module is the best display choice because it is large enough to show a useful waveform UI while still being easy to drive from a prototype MCU.
SSD1306 0.96in I2C OLED module Generic AI suggestion - verify availability
Cheap and easy display for trigger status, sample rate, and basic measurements. Good for a prototype UI, but too small for detailed waveform viewing.
ST7789 2.0in SPI TFT module Generic AI suggestion - verify availability
Compact color display with decent resolution and simple SPI wiring. Good compromise between cost, size, and usability for a bench prototype.

Compatibility Notes

  • The STM32H743VIT6 is a high-speed parallel-output ADC, so the STM32H743VIT6 must have enough GPIO bandwidth and DMA strategy to capture data reliably; this is a timing-sensitive design.
  • The STM32H743VIT6 clocking and the ADC front end should be treated as a tightly coupled timing chain, with short traces and careful supply filtering to minimize jitter and noise.
  • The ZFL-1000LN+ front-end amplifier can easily overdrive the ADC if the input signal is large, so input attenuation or protection is likely needed.
  • If the STM32H743VIT6 is used for USB-C PD input, the rest of the system rails still need local regulation for the ADC, amplifier, and MCU.
  • The suggested display modules are typically 3.3 V logic friendly, which matches the STM32H743VIT6 better than 5 V-only peripherals.

You'll Also Need

  • High-speed input attenuator network and protection components.
  • Anti-aliasing filter components for the RF input path.
  • Precision resistors, capacitors, and inductors for the analog front end.
  • Proper RF connectors such as SMA jacks, coax cables, and possibly a 50 ohm termination path.
  • A custom PCB with controlled-impedance routing for the ADC clock and input path.
  • Firmware for triggering, waveform rendering, and data transfer to a PC if desired.
  • Enclosure, heatsinking if needed, and test fixtures.
Estimated BOM Cost: $45-120 (based on live distributor pricing)

Design Considerations

Sampling Architecture
An RF digital oscilloscope is limited first by sampling rate, then by analog front-end quality, then by firmware. With the STM32H743VIT6 at 400 MSPS, your usable input bandwidth will still depend on the front-end amplifier, anti-alias filter, and clock jitter. For a first prototype, keep the signal chain short and accept that this will be a narrowband scope rather than a lab-grade wideband instrument.
Clock Jitter
At RF frequencies, sampling clock jitter directly converts into amplitude noise and degrades effective number of bits. The STM32H743VIT6 is a strong choice because it is intended for jitter cleaning, but it only helps if the PCB layout, power filtering, and reference source are also clean. Put the clock tree close to the ADC and isolate it from noisy digital return currents.
Front-End Linearity
The ZFL-1000LN+ or PGA-103+ can improve sensitivity, but they also make overload easier if the input signal is not controlled. Add attenuation pads, clamp protection, and a defined 50 ohm input path so the ADC is not exposed to large transients. For RF work, a slightly noisier but more linear front end is often more useful than maximum gain.
PCB Layout
This project is layout-sensitive because the ADC, clock generator, and RF input path all interact. Use a solid ground plane, keep the ADC clock trace short and isolated, and separate analog and digital return currents as much as possible. Even a good part selection will perform poorly if the clock and input traces run near fast GPIO or display lines.
Firmware and UI
Use a state-machine firmware architecture with separate acquisition, trigger, display, and communication tasks. The MCU should move ADC data with DMA and avoid doing heavy processing in interrupt context. If you later add PC streaming, design the data path so the display can degrade gracefully when the link is busy.
Validation Strategy
Start by validating the clock and ADC capture chain with a known sine source before attempting arbitrary RF signals. Measure spurs, clipping, and trigger stability at several input amplitudes and frequencies, then compare captured spectra against a known instrument. This will quickly tell you whether the limiting factor is the analog front end, the clock, or the firmware.

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