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5M80ZE64I5N

ALT5M80ZE64I5N

Altera
IC CPLD 64MC 7.5NS 64EQFP
Active3,950 in stock

Overview

The 5M80ZE64I5N is a low-power, non-volatile Complex Programmable Logic Device (CPLD) based on the Altera MAX V architecture. This device features 80 Logic Elements and 64 macrocells with an integrated flash memory block for user data, providing an instant-on solution that requires only a single 1.8V external core supply.

Why Choose This Part

The 5M80ZE64I5N offers a non-volatile architecture that eliminates the need for an external configuration PROM and enables an instant-on time of 0.5 ms or less. It features an internal oscillator and Schmitt trigger inputs for improved noise tolerance, while maintaining a very low standby current of 139 uA.

Applications

System Level Level Shifting
Utilizing the MultiVolt I/O interface to bridge communication between different logic voltage domains.
Power-Up Sequencing
Managing power rail timing and reset signals for high-performance processors and FPGAs due to its instant-on capability.
I/O Expansion
Providing 54 additional general-purpose I/Os to microcontrollers with limited pin counts for simple logic tasks.
Interface Bridging
Implementing custom glue logic or emulated differential signaling like LVDS or RSDS between peripherals.

Key Specifications

Mounting Type Surface Mount
Number of I/O 54
Package / Case 64-TQFP Exposed Pad
Programmable Type In System Programmable
Number of Macrocells 64
Delay Time tpd(1) Max 7.5 ns
Operating Temperature -40degC ~ 100degC (TJ)
Supplier Device Package 64-EQFP (7x7)
Voltage Supply - Internal 1.71V ~ 1.89V
Number of Logic Elements/Blocks 80

Getting Started

Development is supported by the Intel Quartus Prime Lite Edition software, which allows for HDL entry and timing analysis. Hardware designers can evaluate the MAX V family using the Altera MAX V Development Kit or by connecting a USB-Blaster download cable to the device's built-in JTAG BST circuitry.

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