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ADS1262IPW

TIADS1262IPW

Texas Instruments
32 Bit Analog to Digital Converter 5, 10 Input 1 Sigma-Delta 28-TSSOP
NRND392 in stock

Overview

The ADS1262IPW is a precision, 32-bit delta-sigma analog-to-digital converter (ADC) featuring an integrated low-noise programmable gain amplifier (PGA). It provides a complete high-resolution measurement solution with 11 multifunction analog inputs and an internal 2.5V voltage reference with ultra-low drift. This ADC is designed for high-accuracy applications where signal integrity and stability are critical, offering an offset drift of just 1 nV/degC.

Why Choose This Part

It offers exceptional DC performance with a linearity of 3 ppm and extremely low gain drift of 0.5 ppm/degC. The integration of 8 GPIOs and internal fault monitors reduces system complexity and PCB area by eliminating external logic and diagnostic components.

Applications

High-Precision Weigh Scales
Utilizes the 32-bit resolution and low-noise PGA to resolve microvolt-level signals from load cells.
Temperature Controllers
Integrates dual excitation current sources for direct connection to RTDs and thermocouples with minimal external circuitry.
Pressure Sensors
Ideal for bridge-based pressure transducers requiring high linearity and single-cycle settling for fast measurements.
Analog Input Modules
Serves as the front-end for PLC and DCS systems where 50Hz/60Hz rejection and internal fault monitoring are required.

Key Specifications

Features PGA, Temperature Sensor
Input Type Differential, Single Ended
Architecture Sigma-Delta
Configuration MUX-PGA-ADC
Mounting Type Surface Mount
Data Interface SPI
Number of Bits 32
Package / Case 28-TSSOP (0.173", 4.40mm Width)
Reference Type External, Internal
Ratio - S/H:ADC 0:1
Number of Inputs 11
Operating Temperature -40degC ~ 125degC
Supplier Device Package 28-TSSOP
Number of A/D Converters 1
Voltage - Supply, Analog 4.75V ~ 5.25V
Voltage - Supply, Digital 2.7V ~ 5.25V
Sampling Rate (Per Second) 38k

Getting Started

Designers should use the ADS1262EVM-PDK evaluation module to verify performance and capture data via the SPI interface. Ensure the 28-TSSOP package is decoupled with low-ESR capacitors near the AVDD and DVDD pins as specified in the datasheet to maintain the 7 nVRMS noise floor.

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