MCHPENC28J60T-I/ML
Overview
The ENC28J60T-I/ML is a standalone 10Base-T Ethernet controller with an integrated physical layer (PHY) and Media Access Control (MAC) unit. It communicates with a host microcontroller via a standard SPI interface, making it a popular choice for adding network connectivity to systems that lack a dedicated Ethernet peripheral. This device includes an 8 KB transmit/receive packet buffer and features internal DMA for high-speed data movement and hardware-assisted checksum calculation.
Why Choose This Part
The primary advantage is the simple SPI interface and 5V tolerant inputs, which simplify integration with a wide variety of 3.3V and 5V microcontrollers. It minimizes host processor overhead by handling packet filtering, CRC generation, and automatic retransmission on collisions in hardware. Additionally, the integrated PHY and 8 KB buffer reduce the overall bill-of-materials and PCB footprint for space-constrained designs.
Applications
Key Specifications
Getting Started
Engineers typically begin evaluation using the Microchip Ethernet Starter Kit or third-party breakout boards widely available in the hobbyist ecosystem. The Microchip TCP/IP Stack provides a comprehensive library for implementation, while numerous open-source drivers exist for Arduino and PIC platforms. Ensure the 3.1V to 3.6V supply range is maintained, and provide at least 160mA of current to support peak transmission requirements.
ENC28J60T-I/ Family
Comparing specs that differ across variants. The current part is highlighted.
| Part Number | Package | Stock |
|---|---|---|
| ENC28J60T-I/ML (this part) | VQFN-28 | 4,666 |
| ENC28J60T-I/SS | SSOP-28 | 2,265 |
| ENC28J60T-I/SO | SOIC-28 | 3,183 |



