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FM25L04B-GTR

IFXFM25L04B-GTR

Infineon Technologies
FRAM (Ferroelectric RAM) Memory IC 4Kbit SPI 20 MHz 8-SOIC
Active13,707 in stock

Overview

The FM25L04B-GTR is a 4Kbit non-volatile memory using Ferroelectric RAM (FRAM) technology, which allows for write operations at full bus speed without the write delays common in EEPROM or Flash. It operates over a 2.7V to 3.6V supply range and features an SPI interface capable of frequencies up to 20 MHz. The device is organized as 512 x 8 bits and provides extreme endurance for data-intensive logging applications.

Why Choose This Part

This FRAM IC offers 100 trillion read/write cycles and 151-year data retention, far exceeding the lifespan of standard Flash memory. It eliminates write-polling and internal delays, allowing the system to treat non-volatile storage with the speed of standard RAM while consuming only 0.2mA at 1MHz.

Applications

High-Frequency Event Logging
Recording system state or sensor data frequently where traditional EEPROM endurance limits would be exceeded.
Configuration Storage
Maintaining critical system parameters that must be updated instantly before a power loss occurs.
Industrial Controller State
Capturing the exact state of a machine or process at high speed to ensure recovery after power cycles.
Wearable Device Metadata
Low-power storage for activity metrics where fast write times minimize the duration the MCU must stay in high-power modes.

Key Specifications

Technology FRAM (Ferroelectric RAM)
Memory Size 4Kbit
Memory Type Non-Volatile
Memory Format FRAM
Mounting Type Surface Mount
Package / Case 8-SOIC (0.154", 3.90mm Width)
Clock Frequency 20 MHz
Memory Interface SPI
Voltage - Supply 2.7V ~ 3.6V
Memory Organization 512 x 8
Operating Temperature -40degC ~ 85degC (TA)
Supplier Device Package 8-SOIC

Getting Started

Engineers can interface this device using any standard SPI peripheral in Mode 0 or Mode 3. Since writes are performed at bus speed without 'write-in-progress' polling, existing EEPROM drivers may need to be simplified to remove unnecessary delay loops. Hardware write protection is available via the WP pin for securing sensitive data blocks.