MCHPLAN91C111I-NU
Overview
The LAN91C111I-NU is a high-performance single-chip 10/100 Ethernet MAC and PHY designed for embedded systems and industrial environments. It features a versatile bus interface that supports 8-bit, 16-bit, and 32-bit data transfers, making it compatible with a wide range of microprocessors and RISC CPUs. This industrial-grade component includes 8KB of internal SRAM for packet buffering and supports advanced power management modes.
Why Choose This Part
The component integrates a full 10/100 PHY with an adaptive equalizer and baseline wander correction, ensuring reliable communication over various cable lengths. Its unique flat MMU architecture simplifies memory management for the host processor, while the 5V tolerant I/O and 3.3V operation facilitate easy integration into mixed-voltage systems. Additionally, it offers a ultra-low power down mode with a standby current as low as 14 uA.
Applications
Getting Started
To begin development, interface the device via the MII or the generic host bus to your target MCU or FPGA. Use the serial EEPROM interface to store configuration data like the MAC address. Drivers for many legacy RTOS and Linux kernels are available, or you can implement custom drivers using the device's symmetric transmit and receive structures.
LAN91C111I Family
| Part Number | Difference | Stock |
|---|---|---|
| LAN91C111I-NS | S | 609 |
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