MCHPLAN9250/PT
Overview
The LAN9250/PT is a high-performance 10/100 Ethernet controller with an integrated PHY designed for embedded systems that lack an internal MAC. It supports flexible host interfaces including SPI, I2C, and an 8/16-bit parallel bus, making it compatible with a wide range of microcontrollers. The device features hardware-based IEEE 1588v2 time stamping and Energy Efficient Ethernet (802.3az) for precise timing and reduced power consumption.
Why Choose This Part
The LAN9250 reduces system complexity by integrating the MAC and PHY into a single 64-TQFP package with a built-in 1.2V regulator for single 3.3V rail operation. It features a large internal buffer capable of storing over 200 packets and supports HP Auto-MDIX to eliminate the need for crossover cables.
Applications
Key Specifications
Getting Started
Start development with the EVB-LAN9250 evaluation board, which provides access to the SPI and parallel host interfaces. Microchip provides a comprehensive C-based driver library and example code for integrating the controller with PIC32 and other MCU architectures. Ensure the 64-TQFP exposed pad is properly soldered to a ground plane for thermal dissipation and signal integrity.
LAN9250/ Family
Comparing specs that differ across variants. The current part is highlighted.
| Part Number | Package | Stock |
|---|---|---|
| LAN9250/PT (this part) | TQFP-64 | 138 |
| LAN9250/ML | VFQFN-64 | 304 |



