EmbeddedRelated.com
The 2026 Embedded Online Conference
    Parts   FPGAs & CPLDs  CPLDs    LC4256V-75TN144I
LC4256V-75TN144I

LSCCLC4256V-75TN144I

Lattice
CPLD - Complex Programmable Logic Devices PROGRAMMABLE SUPER FAST HI DENSITY PLD
296 in stock
Datasheet Mouser Compare Prices

Overview

The LC4256V-75TN144I is a high-density Complex Programmable Logic Device (CPLD) from the ispMACH 4000V family, featuring 256 macrocells and 96 user I/O. It operates on a 3.3V internal supply and provides a fast propagation delay of 7.5ns for high-speed logic requirements. This device is designed for industrial environments with an operating temperature range of -40C to 105C.

Why Choose This Part

This CPLD offers a low standby current of 12.5mA and a high macrocell count in a 144-pin TQFP package, providing a dense logic-to-size ratio. Its In-System Programmable (ISP) nature allows for field updates and flexible design iterations using standard JTAG interfaces.

Applications

Legacy Interface Bridging
Interfacing between different bus standards such as PCI, SPI, and UART in legacy industrial systems.
I/O Expansion
Providing additional high-speed GPIO for microcontrollers that lack sufficient pin counts or specialized timing capabilities.
Hardware State Machines
Implementing complex, deterministic control logic and state machines that require consistent timing not achievable in software.
Power-Up Sequencing
Managing the power-on sequence and reset logic for complex multi-rail PCB designs.

Key Specifications

Mounting Type Surface Mount
Number of I/O 96
Package / Case 144-LQFP
Programmable Type In System Programmable
Number of Macrocells 256
Delay Time tpd(1) Max 7.5 ns
Operating Temperature -40degC ~ 105degC (TJ)
Supplier Device Package 144-TQFP (20x20)
Voltage Supply - Internal 3V ~ 3.6V
Number of Logic Elements/Blocks 16

Getting Started

Development for the ispMACH 4000V series is typically performed using Lattice Diamond or the legacy ispLEVER Classic software. Hardware programming is achieved via a JTAG interface using a Lattice USB programming cable or compatible third-party ISP programmer. Engineers should consult the Lattice ispMACH 4000V family datasheet for specific pinout mapping of the 144-TQFP package.

Categories

FPGAs & CPLDs > CPLDs
The 2026 Embedded Online Conference