EmbeddedRelated.com
The 2026 Embedded Online Conference
LFE5UM-45F-6BG381C

LSCCLFE5UM-45F-6BG381C

Lattice
ECP5 family device with significantly higher logic and IO capacity for designs that outgrow iCE40 HX resources.
89 in stock

Overview

The LFE5UM-45F-6BG381C is a high-density FPGA from the Lattice ECP5 family featuring 44,000 logic cells and integrated SerDes capabilities. Designed for mid-range applications that require more resources than the iCE40 series, it provides 1990656 bits of total RAM and 203 I/O pins in a 381-ball BGA package. This device balances low power consumption with the high performance needed for complex digital signal processing and high-speed connectivity.

Why Choose This Part

This FPGA offers a significant performance jump from low-density architectures by providing 11,000 LABs and dedicated DSP slices. Its integrated SerDes support enables high-speed serial communication while maintaining a core voltage of approximately 1.1V for improved power efficiency. Additionally, features like bit-stream encryption and TransFR field upgrades ensure secure and flexible long-term deployments.

Applications

Industrial Networking
Implementing real-time Ethernet protocols and industrial fieldbus interfaces using programmable logic.
Video Bridging
Utilizing SerDes and high I/O counts to convert between different video interface standards and resolutions.
Edge Image Processing
Performing hardware-accelerated image filtering and sensor fusion tasks using the integrated DSP blocks.
System Control
Managing complex power sequencing, hardware monitoring, and high-speed peripheral expansion for embedded processors.

Key Specifications

Mounting Type Surface Mount
Number of I/O 203
Package / Case 381-FBGA
Total RAM Bits 1990656
Voltage - Supply 1.045V ~ 1.155V
Number of LABs/CLBs 11000
Operating Temperature 0degC ~ 85degC (TJ)
Supplier Device Package 381-CABGA (17x17)
Number of Logic Elements/Cells 44000

Getting Started

Designers should use the Lattice Diamond software suite for synthesis, placement, and routing. For hardware evaluation, the ECP5-5G Development Kit provides a platform to test SerDes and high-speed I/O performance. Ensure power delivery networks are designed to handle the 1.1V core supply requirements and follow BGA escape routing guidelines for the 0.8mm pitch 381-CABGA package.

The 2026 Embedded Online Conference