TIOPA818IDRGR
Overview
The OPA818IDRGR is a high-speed, decompensated JFET-input operational amplifier designed for wideband applications requiring extremely low input bias current. It features a massive 2.7 GHz gain bandwidth product and a 1400V/us slew rate, making it ideal for high-speed transimpedance stages. The JFET input stage provides a low input bias current of 25 pA and a low voltage noise density of 2.2 nV/rtHz.
Why Choose This Part
The OPA818 provides an exceptional balance of high-speed performance and low-noise JFET inputs, significantly reducing the noise floor in high-gain transimpedance configurations. Its decompensated architecture allows for higher bandwidth at gains of 7 V/V or higher, while the small 3x3mm WSON package minimizes parasitic inductance for stable high-frequency operation.
Applications
Key Specifications
Getting Started
Designers should prioritize a tight PCB layout with a dedicated ground plane to manage the 2.7 GHz GBW. Use the OPA818DRGEVM evaluation module to test performance in various configurations. Ensure power supply bypassing is placed extremely close to the pins to prevent oscillations, especially given the decompensated nature of the amplifier.



