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PI6C557-01BZHIEX

DIOPI6C557-01BZHIEX

Diodes Incorporated
Ethernet, PCI Express (PCIe) IC 100MHz 1 Output 16-TQFN (3x3)
Active5,244 in stock

Overview

The PI6C557-01BZHIEX is a low-jitter PCIe clock generator designed to provide high-performance timing for PCI Express and Ethernet systems. Operating from a 3.0V to 3.6V supply, this device supports both HCSL and LVDS output signaling with a fixed 100MHz frequency. It features integrated spread spectrum capabilities to mitigate electromagnetic interference (EMI) in high-speed digital designs.

Why Choose This Part

This IC offers PCIe 3.0 compliance with flexibility between HCSL and LVDS output types. It includes a spread spectrum option of -0.5% or no spread, selectable via external pins, allowing engineers to optimize for EMI reduction or maximum signal integrity. The compact 3x3mm TQFN-16 package minimizes PCB footprint while maintaining industrial temperature reliability.

Applications

PCI Express Generation 3.0 Systems
Provides the required 100MHz reference clock for PCIe Gen3 lanes in servers and industrial PCs.
Gigabit Ethernet Infrastructure
Used as a stable frequency source for network switches and routers requiring low-jitter performance.
Embedded Industrial Computing
Ideal for single-board computers and industrial automation controllers operating in temperatures from -40C to +85C.

Key Specifications

PLL Yes
Input LVCMOS, LVTTL, Crystal
Output HCSL, LVDS
Main Purpose Ethernet, PCI Express (PCIe)
Mounting Type Surface Mount
Package / Case 16-WFQFN Exposed Pad
Frequency - Max 100MHz
Voltage - Supply 3V ~ 3.6V
Number of Circuits 1
Ratio - Input:Output 1:1
Operating Temperature -40degC ~ 85degC
Supplier Device Package 16-TQFN (3x3)
Differential - Input:Output No/Yes

Getting Started

When designing with this part, ensure the 100MHz crystal or reference input meets the specified stability requirements for PCIe compliance. Use high-quality decoupling capacitors near the VDD pins and follow HCSL/LVDS differential pair routing guidelines for 100-ohm or 85-ohm impedance. Spread spectrum settings should be configured via the SS_EN and SSEL pins during the hardware design phase.

Also Consider

9FGV0241AKILFT RENRenesas Electronics - An alternative PCIe clock generator with ultra-low power consumption and internal termination for HCSL outputs.