MCHPPIC16F13255-I/3LW
Overview
The PIC16F13255-I/3LW is an 8-bit microcontroller based on the Enhanced Mid-Range PIC16 architecture, operating at up to 32MHz with 14KB of Flash memory. It features a rich set of Core Independent Peripherals (CIPs), including a Configurable Logic Block (CLB) and Configurable Logic Cells (CLC), which allow for hardware-level logic implementation without CPU overhead. This MCU is designed for low-power operation, featuring specialized sleep modes and a 256-byte EEPROM for non-volatile data storage.
Why Choose This Part
The inclusion of a Configurable Logic Block (CLB) allows for complex hardware-based state machines and logic gating that operates independently of the core. Its low-power performance is excellent, with sleep currents as low as 0.4uA and a power-optimized RISC architecture. The device offers a high degree of flexibility with 24 I/O pins and a wide array of communication peripherals in a compact 4x4mm VQFN package.
Applications
Key Specifications
Getting Started
Development is supported by the Microchip MPLAB X IDE and the XC8 C Compiler. For hardware debugging and programming, use the MPLAB PICkit 5 or MPLAB ICD 5 in-circuit debugger. Engineers should utilize the MPLAB Code Configurator (MCC) to graphically initialize the CLB and other Core Independent Peripherals.
PIC16F1325 Family
Comparing specs that differ across variants. The current part is highlighted.
| Part Number | RAM | Flash | Stock |
|---|---|---|---|
| PIC16F13255-I/3LW (this part) | 1K | 14KB | 910 |
| PIC16F13254-I/3LW | 512 x 8 | 7KB | 1,001 |




