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PIC18F25K40T-I/MV

MCHPPIC18F25K40T-I/MV

Microchip Technology
PIC PIC® XLP™ 18K Microcontroller IC 8-Bit 64MHz 32KB (16K x 16) FLASH 28-UQFN (4x4)
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Overview

The PIC18F25K40T-I/MV is an 8-bit XLP (Extreme Low-Power) microcontroller featuring 32KB of Flash and a 64MHz internal oscillator. Part of the PIC18 K40 family, it integrates Core Independent Peripherals (CIPs) that handle tasks in hardware to reduce CPU overhead and power consumption. The device includes a 10-bit ADC with Computation (ADC2) for automated signal analysis and multiple serial interfaces in a compact 28-pin UQFN package.

Why Choose This Part

This MCU provides a high performance-to-power ratio with a 64MHz clock speed while maintaining extreme low-power modes like Doze and Idle. It simplifies complex timing and signal processing through hardware-based Core Independent Peripherals, which operate independently of the CPU core to increase system reliability.

Applications

Battery-Powered Remote Sensors
Utilizes XLP technology and automated ADC sampling to maintain long battery life in wireless monitoring nodes.
Industrial Control Modules
The Zero-Cross Detect (ZCD) and hardware timers are ideal for AC line monitoring and motor synchronization.
Capacitive Touch Interfaces
Integrated peripheral support for touch sensing applications requiring low standby current.
Handheld Medical Devices
The small 4x4mm footprint and 5-bit DAC support compact, portable diagnostic equipment.

Key Specifications

Speed 64MHz
RAM Size 2K x 8
Core Size 8-Bit
EEPROM Size 256 x 8
Peripherals Brown-out Detect/Reset, LVD, POR, PWM, WDT
Connectivity I2C, LINbus, SPI, UART/USART
Mounting Type Surface Mount
Number of I/O 25
Core Processor PIC
Package / Case 28-UFQFN Exposed Pad
Data Converters A/D 35x10b; D/A 1x5b
Oscillator Type Internal
Program Memory Size 32KB (16K x 16)
Program Memory Type FLASH
Operating Temperature -40degC ~ 85degC (TA)
Supplier Device Package 28-UQFN (4x4)
Voltage - Supply (Vcc/Vdd) 2.3V ~ 5.5V

Getting Started

Development is supported by the MPLAB X IDE and the XC8 C Compiler from Microchip. Engineers can use the MPLAB Code Configurator (MCC) to graphically initialize the Core Independent Peripherals. Hardware debugging is typically performed using the MPLAB PICkit 4 or ICD 4 in-circuit debuggers.

Part of PIC18F25xx family » PIC18F25

PIC18F25 Family

Comparing specs that differ across variants. The current part is highlighted.

Part Number Flash RAM I/O Pins Package Speed ADC/DAC Stock
PIC18F25K40T-I/MV (this part) 32KB 2K 25 UFQFN-28 64M A/D 35x10b; D/A 1x5b
PIC18F25K40-I/ML 32KB 2K 25 VQFN-28 64M A/D 35x10b; D/A 1x5b 976
PIC18F25K42-I/SS 32KB 2K 25 SSOP-28 64M A/D 24x12b; D/A 1x5b 1,388
PIC18F25K22-I/SP 32KB 1.5K 24 DIP-28 64M A/D 19x10b 8,237
PIC18F25K42-E/ML 32KB 2K 25 VQFN-28 64M A/D 24x12b; D/A 1x5b
PIC18F25K50-I/SP 32KB 2K 22 DIP-28 48M A/D 14x10b 672
PIC18F25Q10-I/ML 32KB 2K 25 VQFN-28 64M A/D 24x10b; D/A 1x5b 3,538
PIC18F25K80-I/SP 32KB 3.6K 24 DIP-28 64M A/D 8x12b 3,360
PIC18F25K42-I/ML 32KB 2K 25 VQFN-28 64M A/D 24x12b; D/A 1x5b 2,717
PIC18F25K50-I/SO 32KB 2K 22 SOIC-28 48M A/D 14x10b 2,498
PIC18F25K42-I/SP 32KB 2K 25 DIP-28 64M A/D 24x12b; D/A 1x5b 558
PIC18F25K40-I/SO 32KB 2K 25 SOIC-28 64M A/D 35x10b; D/A 1x5b 1,123
PIC18F25Q10-I/SP 32KB 2K 25 DIP-28 64M A/D 24x10b; D/A 1x5b 14,009
PIC18F25K83-E/ML 32KB 2K 25 VQFN-28 64M A/D 24x12b; D/A 1x5b 2,717
PIC18F25Q10-E/ML 32KB 2K 25 VQFN-28 64M A/D 24x10b SAR; D/.. 645
PIC18F25K50-I/ML 32KB 2K 22 VQFN-28 48M A/D 14x10b 523
PIC18F25Q10-E/SO 32KB 2K 25 SOIC-28 64M A/D 24x10b SAR; D/.. 710
PIC18F25K50-I/SS 32KB 2K 22 SSOP-28 48M A/D 14x10b 1,906
PIC18F25K80-I/SO 32KB 3.6K 24 SOIC-28 64M A/D 8x12b 613
PIC18F25K42-I/MV 32KB 2K 25 UFQFN-28 64M A/D 24x12b; D/A 1x5b 973
PIC18F25K22-I/ML 32KB 1.5K 24 VQFN-28 64M A/D 19x10b 752

Also Consider

STM32L031K6U6 STMicroelectronics - An alternative 32-bit ARM Cortex-M0+ option if higher computational precision is required at similar ultra-low power levels.
ATMEGA328PB-MNR MCHPMicrochip Technology - A popular 8-bit alternative with comparable Flash size and a familiar AVR instruction set for legacy migration.