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PSC3P5EDACQ1XQLA1

IFXPSC3P5EDACQ1XQLA1

Infineon Technologies
ARM Microcontrollers - MCU Arm Cortex-M33 32-bit MCU+FPU+DSP, 180 MHz, up to 256 KB Flash/64 KB SRAM, Real-time Control
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Overview

The PSC3P5EDACQ1XQLA1 is a high-performance 32-bit microcontroller featuring an Arm Cortex-M33 core with FPU and DSP extensions running at up to 180 MHz. It integrates 128 KB of Flash and 64 KB of SRAM, designed for real-time control applications that require enhanced security through Arm TrustZone technology.

Why Choose This Part

This MCU provides a robust balance of computational power and efficiency with a run current of 25mA at 180 MHz. It features a rich set of 20 timers and dual CAN FD controllers, making it ideal for complex communication tasks and precise timing requirements.

Applications

Secure IoT Gateways
Utilizes TrustZone and integrated security features to protect sensitive data and firmware in connected industrial environments.
Real-Time Industrial Control
Leverages the 180 MHz clock speed and DSP instructions for high-speed motor control or power conversion loops.
Automotive Sensor Fusion
Integrates dual CAN FD interfaces and high-resolution 12-bit ADC channels for processing vehicle networking data.

Key Specifications

Speed 199MHz
RAM Size 64K x 8
Core Size 32-Bit
Peripherals Brown-out Detect/Reset, DMA, I2S, POR, PWM, WDT
Connectivity CANbus, I2C, IrDA, LINbus, SPI, Smart Card, UART/USART
Mounting Type Surface Mount
Number of I/O 39
Core Processor ARM Cortex-M33F
Package / Case 64-LQFP Exposed Pad
Data Converters A/D 18x12b SAR
Oscillator Type External, Internal
Program Memory Size 128KB (128K x 8)
Program Memory Type FLASH
Operating Temperature -40degC ~ 105degC (TA)
Supplier Device Package PG-TQFP-64-22
Voltage - Supply (Vcc/Vdd) 1.71V ~ 3.6V

Getting Started

Developers should utilize the Infineon ModusToolbox software environment for configuration and code development. Hardware evaluation can be performed using compatible XMC or PSoC evaluation kits that support the E-LQFP-64 package and Arm SWD/JTAG debugging interfaces.