TISN65DSI84ZXHR
Overview
The SN65DSI84ZXHR is a high-performance MIPI DSI to FlatLink LVDS bridge that supports resolutions up to 1440 x 900 at 60 frames per second. It translates up to four MIPI DSI data lanes at 1 Gbps per lane into a single-link or dual-link LVDS interface. This bridge facilitates the connection between modern application processors and legacy LVDS display panels in mobile and industrial applications.
Why Choose This Part
The device features extremely low power consumption with a typical run current of 106mA at 1440 x 900 resolution and a shutdown current of just 40uA. Its compact 5x5mm nFBGA package with a 0.5mm pitch is ideal for space-constrained PCB designs. Support for both I2C and MIPI DSI bus-based configuration provides flexibility for initialization and control.
Applications
Key Specifications
Getting Started
Start by configuring the internal registers via the I2C interface to match the MIPI DSI lane count and LVDS timing parameters. Texas Instruments provides the DSI-Tuning-Tool software to calculate the register settings required for specific panel resolutions. Ensure proper signal integrity for the 1 Gbps MIPI lanes by following high-speed differential pair routing guidelines and providing a stable 1.8V VDD supply.
