BOOTLOADER only works in debug mode

Started by Dan Azari May 31, 2005
Hi All,

I'm quite frustrated by a programming problem, and hope that someone can point out a possible cause. I am using a slightly modified version of the serial bootloader provided in AN2153 on a 9S12A128, mask OL85D. When I run the bootloader with a BDM pod attached, it runs perfectly. However, without a BDM pod the program goes off in la-la land. In order to debug I've placed a logic analyzer on PORTA which I set to different values at various points during the program. I've isolated the problem to a function (SCIInit) not returning to the proper location. I'm not sure where it goes. Here is a snippet of the code: ;*********************************************************************************************************************
Boot:
ldaa #$55 ; reset the COP before writing to the COP control register.
staa ARMCOP ; (required during development when the part is reset in special
coma ; mode & the DISR bit is set)
staa ARMCOP
clr COPCTL ; disable watchdog
;
movb #$18, DDRM ; set port M.3,4 for output
movb #DISABLE_RESET + POWER_LED_ON, PORTM ; set port M.3 low to disable reset pulses, solid LED
;
;
BootCopy: lds #StackTop ; initialize the stack pointer
ldx #BootStart ; point to the start of the Flash bootloader in Flash.
ldy #RAMBoot ; point to the start of on-chip RAM.
ldd #BootLoadEnd ; calculate the size of the bootloader code.
subd #BootStart
MoveMore: movb 1,x+,1,y+ ; move a byte of the bootloader into RAM.
dbne d,MoveMore ; dec byte count, move till done.
;
ldab #$e0+RAMHAL ; write to the INITRM register to overlay the Flash bootblock with RAM.
;
if *&$0001<>0
nop
endif
;
stab >INITRM ; this instruction MUST use extended addressing an be aligned to an even byte boundary.
;
nop
ldab #REFDVVal ; set the REFDV register to give us a 1.0 MHz reference.
stab REFDV
ldab #SYNRVal ; set the SYNR register to give us a 24.0 MHz E-clock.
stab SYNR
nop ; nops required for bug in initial silicon.
nop
nop
nop
brclr CRGFLG,#LOCK,* ; wait here till the PLL is locked.
bset CLKSEL,#PLLSEL ; switch the bus clock to the PLL.
;
movb #$80, MODE ; normal mode
; DEBUG STUFF
movb #$88,PORTA
movb #$ff, DDRA ;PTP.5 DEBUG PIN
;
ldab #FCLKDIVVal ; value for the Flash & EEPROM clock divider register.
stab FCLKDIV
stab ECLKDIV
;
movb #$02,PORTA
ldd #Baud9600 ; set SCI to 9600 baud @ 25.0 MHz
jsr SCIInit,pcr ; go initialize the SCI.
movb #$03,PORTA
cli ; enable interrupts.
movb #$04,PORTA

;
;
;*************************************************************************************************************
;
SCIInit: std SCI0BD ; initialize the baud rate register.
movb #$aa,PORTA
ldab #RxBufSize ; init number of available Rx
stab RxBAvail,pcr ; queue bytes to RxBuffSize.
ldab #TxBufSize ; init number of available Tx
stab TxBAvail,pcr ; queue bytes to TxBuffSize.
ldab #TE+RE+RIE ; get bit mask for Tx, Rx & Rx interrupt.
stab SCI0CR2 ; enable Tx & Rx & Rx interrupts.
leax SCIISR,pcr ; setup SCI interrupt vector to point to the
stx SCI0 ; bootloader's SCI interrupt service routine.
movb #$ab,PORTA
rts ; done.
;
;*************************************************************************************************************
;

With the BDM pod attached I get normal execution.

Logic Analyzer: 0x88, 0x02, 0xaa, 0xab, 0x03, 0x04.....

Without the BDM:

Logic analyzer: 0x88, 0x02, 0xaa, 0xab

No change after 0xab, never makes it to the statement after the jsr SCIInit, pcr

Any suggestions??

Dan

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Hi Dan,

It looks like a stack initialization problem. The startup script of your
debugger might change something that your startup code didn't.
Did you check the module mapping? Here is a quote from the reference manual:
"Note that after reset ... The bottom 1K Bytes of RAM ($0000 - $03FF) are
hidden by the register space."

Regards,
Kares > -----Original Message-----
> From: 68HC12@68HC... [mailto:68HC12@68HC...] On Behalf Of
> Dan Azari
> Sent: 31 May 2005 03:48
> To: 68HC12@68HC...
> Subject: [68HC12] BOOTLOADER only works in debug mode [license expired]
>
> Hi All,
>
> I'm quite frustrated by a programming problem, and hope that someone can
> point out a possible cause. I am using a slightly modified version of the
> serial bootloader provided in AN2153 on a 9S12A128, mask OL85D. When I
> run the bootloader with a BDM pod attached, it runs perfectly. However,
> without a BDM pod the program goes off in la-la land. In order to debug
> I've placed a logic analyzer on PORTA which I set to different values at
> various points during the program. I've isolated the problem to a
> function (SCIInit) not returning to the proper location. I'm not sure
> where it goes. Here is a snippet of the code: