SPI Interrupt help needed

Started by adlai15 September 15, 2005
Hi,

I'm using a 9S12NE64 and am trying to communicate throught the SPI
port.

For some reason, the SPI's SPTEF interrupt is never clearing. I'm
initializing the SPI with the following code:

SPICR1 = 0xD4; // Enable SPI, SPI Interrupt, Disable Transmit Int,
Master Mode, Active low SCLK, MSBit first

SPICR2 = 0x00; // Normal Mode; Clock operates in Wait Mode; SS
Port not used

SPIBR = 0x00; // 12.5 MHz: BusClock(25,000,000) / 2(Baud Rate
Divisor)

To kick off the transmission of data, I enable the SPTEF by writing
a 1 to the SPTIE. This causes an interrupt to occur, and I expect
the interrupt handler to take it from there.

Below is my interrupt handler. If I stop the code with the debugger
I find it is continuing to re-enter the interrupt handler
with "spi_byte_to_transmit" continuing to increment. However, when I
restart the code, the interrupt becomes disabled, and it works fine.
It's as though there is a delay or something else I'm missing that
is provided when I stop the code. I've checked the errata for this
Freescale chip, but no SPI problems are mentioned. Does anyone have
any ideas as to what might be wrong here?

Note: these are the settings prior to entering the interrupt handler
the first time

SPISR_SPTEF_MASK = 32;
SPICR1_SPTIE_MASK = 32;
total_spi_bytes_to_transmit = 4;
spi_byte_to_transmit = 0;

interrupt void spi_isr(void)
{
spi_sr = SPISR; // read the status register
if(spi_sr & SPISR_SPTEF_MASK) // then the Transmit buffer is empty
{
SPIDR = spi_data_buf[spi_byte_to_transmit]; // Write to data reg
spi_byte_to_transmit++;

if(total_spi_bytes_to_transmit == spi_byte_to_transmit)
SPICR1 &= ~SPICR1_SPTIE_MASK; // Disable the TIE
}
} Regards,
Adlai


Hi Adlai

You are also enabling the SPI interrupt for reception but not
handling receiver interrupts in the interrupt routine (when a byte
is transmitted, one is also received). It is probably that the
interrupt is being executed infinitely due to this, although I can't
explain why the TX interrupt bit would be set in this case.

Try setting SPRCR1 to 0x54 so that only the Tx interrupts are
enabled and there may be an improvement.

Regards

Mark Butcher
www.mjbc.ch

--- In 68HC12@68HC..., "adlai15" <adlai15@y...> wrote:
> Hi,
>
> I'm using a 9S12NE64 and am trying to communicate throught the SPI
> port.
>
> For some reason, the SPI's SPTEF interrupt is never clearing. I'm
> initializing the SPI with the following code:
>
> SPICR1 = 0xD4; // Enable SPI, SPI Interrupt, Disable Transmit
Int,
> Master Mode, Active low SCLK, MSBit first
>
> SPICR2 = 0x00; // Normal Mode; Clock operates in Wait Mode; SS
> Port not used
>
> SPIBR = 0x00; // 12.5 MHz: BusClock(25,000,000) / 2(Baud Rate
> Divisor)
>
> To kick off the transmission of data, I enable the SPTEF by
writing
> a 1 to the SPTIE. This causes an interrupt to occur, and I expect
> the interrupt handler to take it from there.
>
> Below is my interrupt handler. If I stop the code with the
debugger
> I find it is continuing to re-enter the interrupt handler
> with "spi_byte_to_transmit" continuing to increment. However, when
I
> restart the code, the interrupt becomes disabled, and it works
fine.
> It's as though there is a delay or something else I'm missing that
> is provided when I stop the code. I've checked the errata for this
> Freescale chip, but no SPI problems are mentioned. Does anyone
have
> any ideas as to what might be wrong here?
>
> Note: these are the settings prior to entering the interrupt
handler
> the first time
>
> SPISR_SPTEF_MASK = 32;
> SPICR1_SPTIE_MASK = 32;
> total_spi_bytes_to_transmit = 4;
> spi_byte_to_transmit = 0;
>
> interrupt void spi_isr(void)
> {
> spi_sr = SPISR; // read the status register
> if(spi_sr & SPISR_SPTEF_MASK) // then the Transmit buffer is
empty
> {
> SPIDR = spi_data_buf[spi_byte_to_transmit]; // Write to data
reg
> spi_byte_to_transmit++;
>
> if(total_spi_bytes_to_transmit == spi_byte_to_transmit)
> SPICR1 &= ~SPICR1_SPTIE_MASK; // Disable the TIE
> }
> } > Regards,
> Adlai