Help with SPI Setup!

Started by adax3 October 6, 2005
Hello:

I am using (well, trying to) the 9S12DP256B to simply get the output
of an SPI Analog Devices 8bit SPI ADC (AD7823YR).

I'm not sure if I'm setting it up right, as I am NOT getting a clock
signal out. My init code is as follows (using Codewarrior 5.5 IDE):

PTS = 0; // port S zero
DDRS = 0x00; // port S direction (0-7 inputs)

// SPI Init
//SPI Control Reg 1 (SPI0CR1)
SPI0CR1_SPIE = 0; // SPI interupts off
SPI0CR1_SPE = 1; // enable SPI ports
SPI0CR1_SPTIE = 0; // Interupts off
SPI0CR1_MSTR = 1; // SPI MASTER (not slave)
SPI0CR1_CPOL = 0; // Active High Clock
SPI0CR1_CPHA = 1; // ?? Don't shift Clock
SPI0CR1_SSOE = 1; // SS output
SPI0CR1_LSBFE = 0; // MSB transfered first

// SPI Control Reg 2 (SPI0CR2)
SPI0CR2_MODFEN = 1; // Enable SS
SPI0CR2_BIDIROE = 0;
SPI0CR2_SPISWAI = 0;
SPI0CR2_SPC0 = 0;

// SPI Baud Rate Reg
SPI0BR_SPPR2 = 0; //48Mhz -- 24Mhz Bus ?
SPI0BR_SPPR1 = 1; // So 010000 for Clock Divisor of 6
SPI0BR_SPPR0 = 0; // for 4Mhz SPI Clock
SPI0BR_SPR1 = 0;
SPI0BR_SPR0 = 0;
I need to start a conversion with a falling edge, and bring it back up
within 3us to open the serial port. I assume I can do this with:

//initiate a conversion start
PTS &= 0x80; // Set pin 7 (SS) to low
asm nop // 21ns
asm nop // 21ns -- need >20ns for pulse width
PTS |= 0x80; // SS High (within 3us to prevent power down)

Then just read SPI0DR for the value... Any idea on why my setup isn't working?? Thanks!


--- In 68HC12@68HC..., "adax3" <adax3@y...> wrote:

> // SPI Init
> //SPI Control Reg 1 (SPI0CR1)
> SPI0CR1_SPIE = 0; // SPI interupts off
> SPI0CR1_SPE = 1; // enable SPI ports
> SPI0CR1_SPTIE = 0; // Interupts off
> SPI0CR1_MSTR = 1; // SPI MASTER (not slave)
> SPI0CR1_CPOL = 0; // Active High Clock
> SPI0CR1_CPHA = 1; // ?? Don't shift Clock
> SPI0CR1_SSOE = 1; // SS output
> SPI0CR1_LSBFE = 0; // MSB transfered first
>
> // SPI Control Reg 2 (SPI0CR2)
> SPI0CR2_MODFEN = 1; // Enable SS
> SPI0CR2_BIDIROE = 0;
> SPI0CR2_SPISWAI = 0;
> SPI0CR2_SPC0 = 0;

Note that SSOE in the CR1 is enabling SPI to control the output of
SS (rather than gp output). You still need to change DDRS to enable
the output pins. Where you say "SPI0CR2_MODFEN = 1" perhaps you
don't want. It doesn't enable SS, it enables an error that can be
triggered in master mode when SS is an input. > I need to start a conversion with a falling edge, and
> bring it back up
> within 3us to open the serial port. I assume I can do this with:
>
> //initiate a conversion start
> PTS &= 0x80; // Set pin 7 (SS) to low
> asm nop // 21ns
> asm nop //
> 21ns -- need >20ns for pulse width
> PTS |= 0x80; // SS High (within 3us
> to prevent power down)
>
> Then just read SPI0DR for the value... > Any idea on why my setup isn't working?? Thanks!
>

Do you need to manipulate SS manually before or after you initialize
SPI? If before, you would need to enable it first in DDRS. If after,
you could not have SPI0CR1_SSOE set because it would not allow you
to manipulate it manually. --jeffs


hmmm! Well, I took your seemingly correct suggestion, and changed my
control registers, and changed my data direction.

PTS = 0; // port S zero
DDRS = 0xDA; // -- outputs 11011010
PERS = 0x00; // port S disable pullups

// SPI Init
//SPI Control Reg 1 (SPI0CR1)
SPI0CR1_SPIE = 0; // SPI interupts off
SPI0CR1_SPE = 1; // enable SPI ports
SPI0CR1_SPTIE = 0; // Interupts off
SPI0CR1_MSTR = 1; // SPI MASTER (not slave)
SPI0CR1_CPOL = 0; // Active High Clock
SPI0CR1_CPHA = 1; // ?? Don't shift Clock
SPI0CR1_SSOE = 0; // SS output
SPI0CR1_LSBFE = 0; // MSB transfered first // SPI Control Reg 2 (SPI0CR2)
SPI0CR2_MODFEN = 0;
SPI0CR2_BIDIROE = 0;
SPI0CR2_SPISWAI = 0;
SPI0CR2_SPC0 = 0;

// SPI Baud Rate Reg
SPI0BR_SPPR2 = 0; //48Mhz -- 24Mhz Bus ?
SPI0BR_SPPR1 = 1; // So 010000 for Clock Divisor of 6
SPI0BR_SPPR0 = 1; // for 4Mhz SPI Clock
SPI0BR_SPR1 = 1;
SPI0BR_SPR0 = 1;

My big problem here...is that I get no clock output on SCK0 Pin of the
MCU....What could I be missing??? Help! --- In 68HC12@68HC..., "Jefferson Smith" <imajeff84663@y...>
wrote:
>
> --- In 68HC12@68HC..., "adax3" <adax3@y...> wrote:
>
> > // SPI Init
> > //SPI Control Reg 1 (SPI0CR1)
> > SPI0CR1_SPIE = 0; // SPI interupts off
> > SPI0CR1_SPE = 1; // enable SPI ports
> > SPI0CR1_SPTIE = 0; // Interupts off
> > SPI0CR1_MSTR = 1; // SPI MASTER (not slave)
> > SPI0CR1_CPOL = 0; // Active High Clock
> > SPI0CR1_CPHA = 1; // ?? Don't shift Clock
> > SPI0CR1_SSOE = 1; // SS output
> > SPI0CR1_LSBFE = 0; // MSB transfered first
> >
> > // SPI Control Reg 2 (SPI0CR2)
> > SPI0CR2_MODFEN = 1; // Enable SS
> > SPI0CR2_BIDIROE = 0;
> > SPI0CR2_SPISWAI = 0;
> > SPI0CR2_SPC0 = 0;
>
> Note that SSOE in the CR1 is enabling SPI to control the output of
> SS (rather than gp output). You still need to change DDRS to enable
> the output pins. Where you say "SPI0CR2_MODFEN = 1" perhaps you
> don't want. It doesn't enable SS, it enables an error that can be
> triggered in master mode when SS is an input. > > I need to start a conversion with a falling edge, and
> > bring it back up
> > within 3us to open the serial port. I assume I can do this with:
> >
> > //initiate a conversion start
> > PTS &= 0x80; // Set pin 7 (SS) to low
> > asm nop // 21ns
> > asm nop //
> > 21ns -- need >20ns for pulse width
> > PTS |= 0x80; // SS High (within 3us
> > to prevent power down)
> >
> > Then just read SPI0DR for the value...
> >
> >
> > Any idea on why my setup isn't working?? Thanks!
> >
>
> Do you need to manipulate SS manually before or after you initialize
> SPI? If before, you would need to enable it first in DDRS. If after,
> you could not have SPI0CR1_SSOE set because it would not allow you
> to manipulate it manually. --jeffs
>




> My big problem here...is that I get no clock output on SCK0 Pin of the
> MCU....What could I be missing??? Help!
>

My 2 pennies to this problem of yours.

Are you simply reading the SPIODRL or did you send a dummy data out
then read SPIODRL?



I did not send dummy data out -- but I'm not even getting a clock out
of my MCU, so I'm not sure how they would help?

--- In 68HC12@68HC..., "zeta_alpha2002" <zeta_alpha2002@y...>
wrote:
>
> > My big problem here...is that I get no clock output on SCK0 Pin of the
> > MCU....What could I be missing??? Help!
> >
>
> My 2 pennies to this problem of yours.
>
> Are you simply reading the SPIODRL or did you send a dummy data out
> then read SPIODRL?
>




--- In 68HC12@68HC..., "adax3" <adax3@y...> wrote:
>
> hmmm! Well, I took your seemingly correct suggestion, and changed
my
> control registers, and changed my data direction.

Hum. Now that I look more, it says we only need to use DDRS in the
HC12. For 9S12 it says SPI hardware controls pin direction. I guess
SCK is supposed to automatically be an output in Master mode.

So to use SS, set
MODFEN = 0
and you should be able to set DDRS bit7 and use SS (PS7) as a
general purpose output. This is how I frame 16 bits instead of 8
bits for a digital pot, but I've only done it in HC12

I want to try some Asm code on my board, but haven't got time yet.


> I did not send dummy data out -- but I'm not even getting a clock out
> of my MCU, so I'm not sure how they would help?

Oh it would help quite a bit. Try it and see what happens.

Typically one should send a dummy data to clock out data of the slave
device. Unless of course, the slave is a master, but in this case the
MCU is the master ergo..


--- In 68HC12@68HC..., "adax3" <adax3@y...> wrote:
>
> I did not send dummy data out -- but I'm not even getting a clock
out
> of my MCU, so I'm not sure how they would help?

Oh, silly me. I assumed you were sending a byte out (even though you
don't have it in your code).

The only thing that triggers SCK to start ticking is the moment you
*write* to SPIDR. Obviously it doesn't matter what you send if the
device isn't reading it. --jeffs