Difference between D-Flash and Emulated EEPROM

Dear Everyone,

I am working with the MC9S12XS128 MCU.

This MCU doesnt have the EEPROM but it has D-Flash.

And I studied the data sheet for MC9S12XEP100 refference manual and
the application note AN3490.pdf.
Which says MC9S12XEP100 has the optional Emulated EERPOM which can be
done by carefully partioning the availabe D-Flash. And the document
says it has many advantages like ..
"A method to emulate the small sector size features and endurance
characteristics associated with an EEPROM."

And I came to know we can implement this hardware Emulated EEPROM
concept through software for my MCU i.e. MC9S12XS128.
Everything is Ok, fine. But, I have a great confusion about what are
the major differences between the D-Flash and Emulated EERPOM except
the price/money factor.

I know, in D-Flash the maximum program word size is 4, and erase size
is a sector i.e 256bytes and

Emulated EERPOM uses the Round robin technique.i.e. Active and Ready
sector which will be programmed/erased cyclically.And using Hardware
emulated EEPROM, we can directly access RAM as NVRAM after
partitioning.But the following questions are still there for me..
My Questions are...

1. What is the major advantage of this Round robin technique in the
hardware emulated EERPOM

2. How this Emulated EERPOM is being emulated to have smaller sector
size.. This is the major confution..

3. What is the major operational difference between D-Flash and the
emulated EEPROM

I know I have to read more about it.. but ...Kindly clarify these
questions clearly if possible...it may help my progess to go much
faster ....

I am really in Urjent time now...

Start a New Thread