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Fw: HCS12 with non-multiplexed expand paged memory.

Started by Andrew Lohmann's New Email Server February 24, 2003
Hi All,

Does anyone know if there will be a variant of HCS12 with non-multiplexed memory in the future? It seems to me that the only option is to use HC16, but this a little different, does not have so much flash and may be an unpopular choice.

I have used this controller and find the interrupt handling elegant and fast, but I wish to use a more popular part. As I fear it's now not widely supported. Andrew Lohmann AIIE
Design Engineer

Bellingham + Stanley Ltd.
Longfield Road, Tunbridge Wells, Kent, TN2 3EY, England.
Tel: +44 (0) 1892 500400
Fax: +44 (0) 1892 543115
Website: www.bs-ltd.com
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At 10:34 AM 2/24/03 +0000, Andrew Lohmann <> wrote:
>Does anyone know if there will be a variant of HCS12 with non-multiplexed
>memory in the future?

Check out the 812A4. This is an older part that maxes out at 8 MHz.
It doesn't have any on-chip flash, but it is very easy to add external
flash. The built-in paging hardware can handle 4M of PPAGE code space
and 1M + 256K of additional paged memory.

The 812A4 board I'm working on puts a 2M flash chip in that PPAGE space.

Note, by the way, that although the 812A4 is specified to run to 8 MHz,
its bus specifications are hard to satisfy at that speed. If meeting the
timing specs is important to you, you may find yourself limited to 5 or
6 MHz. However, there have been several reports on the list of successful
systems that run at 8 MHz.

>It seems to me that the only option is to use HC16, but this a little
>different, does not have so much flash and may be an unpopular choice.

My lab used an HC16 and a pair of HC05s for a previous generation product.
The new design uses an 812A4 as the main CPU and 912B32s as I/O processors.

Stephen

--
Stephen Trier
Technical Development Lab
Cleveland FES Center / CWRU
/ KG8IH



on 2/24/03 3:04 PM, Stephen Trier at wrote: Check out the
812A4. This is an older part that maxes out at 8 MHz. It doesn't have any
on-chip flash, but it is very easy to add external flash. The built-in
paging hardware can handle 4M of PPAGE code space and 1M + 256K of
additional paged memory. The 812A4 board I'm working on puts a 2M flash chip
in that PPAGE space. Do you have any info on how you did this? I'm working on a board using the
812A4 and I'm trying to use the paged memory for code in ROM. I've set up a
jumper to route the program chip selects to RAM during development so I can
have the entire program plus data in RAM for debugging, then change the
jumper when I want to have the program in ROM for production.

Problem is, when I burn the ROMs, they don't boot. On the same board, if I
build a smaller program that fits in the 32K from $8000..$FFFF so it doesn't
use paging, the ROMs work.

I suspect that my problem revolves around the fact that the 2 lowest bits of
PPAGE replace A14 and A15 so the program needs to reside in a different
physical area than a non--paged program resides, but I don't know the best
way to accomodate this.

I'm using the IAR compiler. Their tech person has offered suggestions but
so far nothing works.

Many thanks if you (or anyone else out there) can help.

Dick



In a message dated 2/24/03 4:17:05 PM Eastern Standard Time,
writes:

> Many thanks if you (or anyone else out there) can help.
The Tech Arts 812DX schematics are on line, and there is an example of a
multiple page program in ICC12 there as well. My experience with the HC12A4
and paging is that it works great once you get the HC12Setup() subroutine
called at powerup right, and you get the compiler and linker options right. I
know for a fact that it does indee work.


Dick,

The $8000-$BFFF range in non-paged mode is equivalent to page $FE in paged
mode. Your programs should work OK in paged mode if you load PPAGE with
$FE before you turn on paging by writing to WINDEF and MXAR.

It sounds like things work correctly when running out of RAM, which is
strange if the RAM is mapped to exactly the same PPAGE range as the ROM.
Is it?

The board I'm working on powers up in single-chip mode, then switches to
expanded mode under software control, so I haven't had to deal with quite
the same issues.

Stephen

--
Stephen Trier
Technical Development Lab
Cleveland FES Center / CWRU
/ KG8IH



Thanks for your various comments on non-multiplexed expanded memory variant
of HCS12.

I had discounted HC12A because it looked like it was on the way out. I am
working on a new design and have not purchased a C compiler yet, and
therefore would like to select a part which will do what I need for a long
time.

Another suggestion I had was look at Mitsubishi M16C, but HC12/16 is more
convenient because I have a lot of Hitachi HD6301 assembler code which is
similar to MC6801. Andrew Lohmann AIIE
Design Engineer

Bellingham + Stanley Ltd.
Longfield Road, Tunbridge Wells, Kent, TN2 3EY, England.
Tel: +44 (0) 1892 500400
Fax: +44 (0) 1892 543115
Website: www.bs-ltd.com
----- Original Message -----
From: Dick Webb <>
To: <>
Sent: Monday, February 24, 2003 9:15 PM
Subject: Re: [68HC12] Fw: HCS12 with non-multiplexed expand paged memory. > on 2/24/03 3:04 PM, Stephen Trier at wrote: Check out the
> 812A4. This is an older part that maxes out at 8 MHz. It doesn't have any
> on-chip flash, but it is very easy to add external flash. The built-in
> paging hardware can handle 4M of PPAGE code space and 1M + 256K of
> additional paged memory. The 812A4 board I'm working on puts a 2M flash
chip
> in that PPAGE space. > Do you have any info on how you did this? I'm working on a board using the
> 812A4 and I'm trying to use the paged memory for code in ROM. I've set up
a
> jumper to route the program chip selects to RAM during development so I
can
> have the entire program plus data in RAM for debugging, then change the
> jumper when I want to have the program in ROM for production.
>
> Problem is, when I burn the ROMs, they don't boot. On the same board, if I
> build a smaller program that fits in the 32K from $8000..$FFFF so it
doesn't
> use paging, the ROMs work.
>
> I suspect that my problem revolves around the fact that the 2 lowest bits
of
> PPAGE replace A14 and A15 so the program needs to reside in a different
> physical area than a non--paged program resides, but I don't know the best
> way to accomodate this.
>
> I'm using the IAR compiler. Their tech person has offered suggestions but
> so far nothing works.
>
> Many thanks if you (or anyone else out there) can help.
>
> Dick >
>
> -------------------- >
> ">http://docs.yahoo.com/info/terms/ >
>
> --- Email Disclaimer ---
>
> Internet communications are not secure and therefore Bellingham + Stanley
Ltd does
> not accept legal responsibility for the contents of this message. Any
views
> or opinions presented are solely those of the author and do not
necessarily
> represent those of Bellingham + Stanley Ltd unless otherwise specifically
stated.
> If this message is received by anyone other than the addressee, please
> notify the sender and then delete the message and any attachments from
your
> computer.
>
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>


--- Email Disclaimer ---

Internet communications are not secure and therefore Bellingham + Stanley Ltd does
not accept legal responsibility for the contents of this message. Any views
or opinions presented are solely those of the author and do not necessarily
represent those of Bellingham + Stanley Ltd unless otherwise specifically stated.
If this message is received by anyone other than the addressee, please
notify the sender and then delete the message and any attachments from your
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