|
The 'S12 EEPROM programming is similar to Flash programming, but has an extra command "Sector Modify" to allow a sector erase (4 bytes) to be immediately followed up by two word writes. As I understand it, the first write is embedded in the "Sector Modify" command, and then the second write needs to be "pipelined". I haven't been able to find what flags etc need to be checked in this pipelining process, so would appreciate if anyone who has implemented a generic EEPROM write using this command (pref. in assembler), could post or back-channel. Thanks in advance.. Bruce |
|
|
'S12 EEPROM routine
Started by ●July 16, 2002
Reply by ●July 16, 20022002-07-16
|
Bruce The sector modify command erases two words and writes the first word. Since the programming registers are buffered, you can give the the programming command for a write of the second word without waiting for the sector modify command to complete. They refer to this as pipelining. You must then wait on the status flag CCIF which indicates the NO commands are pending.. The EEPROM manual states: "All internal program and erase timings are handled by a state machine. The timebase is derived from the oscillator clock OSCCLK via a programmable down counter. The command register as well as the associated address and data registers operate as a buffer and a register (2-stage FIFO), so that a new command along with the necessary data and address can be stored to the buffers while the previous command is still in progress. Buffers empty situation as well as command completion are signalled by flags in the status register. Interrupts will be generated if enabled". Regards Dave Perreault bruce_at_pocket_neurobics wrote: > The 'S12 EEPROM programming is similar to Flash programming, but has > an extra command "Sector Modify" to allow a sector erase (4 bytes) to > be immediately followed up by two word writes. As I understand it, the > first write is embedded in the "Sector Modify" command, and then the > second write needs to be "pipelined". > > I haven't been able to find what flags etc need to be checked in this > pipelining process, so would appreciate if anyone who has implemented > a generic EEPROM write using this command (pref. in assembler), could > post or back-channel. > > Thanks in advance.. Bruce > -------------------- > > ">http://docs.yahoo.com/info/terms/ |
|
|
Reply by ●July 16, 20022002-07-16
|
--- In 68HC12@y..., Dave Perreault <briggsroad@c...> wrote: > Bruce > > The sector modify command erases two words and writes the first > word. Since the programming registers are buffered, you can give > the the programming command for a write of the second word > without waiting for the sector modify command to complete. They > refer to this as pipelining. You must then wait on the status flag CCIF which indicates the NO commands are pending.. > Thanks Dave I post what I have at the bottom of email.. This code hasn't been tested but illustrates a problem in porting code from some earlier versions (the 'D60) in my case. The code being ported makes pretty extensive use of aligned word manipulations of the EEPROM. With the 'S12 supporting only 4 byte-aligned sector erase (ie 2 lsb in address are don't care), word manipulations of the EEPROM are a little tricky. I now have three routines doing the work of a single routine in the old 'D60 code. (i) writes an arbitrary number of long-word aligned sectors, (ii) writes the first word of a longword aligned sector, and (iii) writes the second word of a longword aligned sector. (ii) & (iii) preserve the other word of the sector. [I hope and trust there was a good engineering reason for not implementing word-length sectors on the 'S12 eeprom.] ****************************************************************************** * WRITE_EEPROM - GENERAL_INIT PURPOSE SUBROUTINE * * - X: source data (RAM/ROM) * * - Y: destination (EEPROM) * * - B: no of _LONGWORDS_ to write * * - interrupts should be disabled * * - A: preserved * * - WRITES MUST BE LONG WORD ALIGNED!! * * - this routine should be less than COP timeout: probably 1 sec * ****************************************************************************** WRITE_EEPROM PSHA JSR COP_SERVICE brclr ECLKDIV,#EDIVLD,EEPROM_exit ;abort if clock divider not set _EEPROM_PROG_LOOP movw 2,x+,2,y+ ; store data to ALIGNED! EEPROM address movb #SEC_MOD,ECMD ; sector modify command (erase 4B, write 2B) movb #CBEIF,ESTAT ; start the command by writing a 1 to CBEIF. ldaa ESTAT ; check to see if there was a problem executing ; the command. bita #PVIOL+ ACCERR ; if either the PVIOL or ACCERR bit is set, bne EEPROM_exit ; return. movw 2,x+,2,y+ ; store data to ALIGNED! EEPROM address movb #PROG,ECMD ; sector modify command (erase 4B, write 2B) movb #CBEIF,ESTAT ; start the command by writing a 1 to CBEIF. ldaa ESTAT ; check to see if there was a problem executing ; the command. bita #PVIOL+ ACCERR ; if either the PVIOL or ACCERR bit is set, bne EEPROM_exit ; return. brclr ESTAT,#CBEIF,* ; wait here till the command buffer is empty. dbne b,_EEPROM_PROG_LOOP ; any more words to program? brclr ESTAT,#CCIF,* EEPROM_exit JSR COP_SERVICE PULA RTS ****************************************************************************** ****************************************************************************** * WRITE_EEPROM_WORD - write first word of long word block * * - preserves second word * * - X: source data (RAM/ROM) * * - Y: destination (EEPROM) * * - interrupts should be disabled * * - A: preserved * * - WRITES MUST BE LONG WORD ALIGNED!! * * - this routine should be less than COP timeout: probably 1 sec * ****************************************************************************** WRITE_EEPROM_WORD PSHA JSR COP_SERVICE brclr ECLKDIV,#EDIVLD,EEPROM_W_exit ;abort if clock divider not set movw 2,y,2,-sp ; save 2nd word in EEPROM sector movw 2,x+,2,y+ ; store data to ALIGNED! EEPROM address movb #SEC_MOD,ECMD ; sector modify command (erase 4B, write 2B) movb #CBEIF,ESTAT ; start the command by writing a 1 to CBEIF. ldaa ESTAT ; check to see if there was a problem executing ; the command. bita #PVIOL+ ACCERR ; if either the PVIOL or ACCERR bit is set, bne EEPROM_W_exit ; return. movw 2,sp+,2,y+ ; restore previous value in 2nd word of sector movb #PROG,ECMD ; sector modify command (erase 4B, write 2B) movb #CBEIF,ESTAT ; start the command by writing a 1 to CBEIF. ldaa ESTAT ; check to see if there was a problem executing ; the command. bita #PVIOL+ ACCERR ; if either the PVIOL or ACCERR bit is set, bne EEPROM_W_exit ; return. brclr ESTAT,#CBEIF,* ; wait here till the command buffer is empty. brclr ESTAT,#CCIF,* EEPROM_W_exit JSR COP_SERVICE PULA RTS ****************************************************************************** ****************************************************************************** * WRITE_EEPROM_WORD_2ND - write second word of long word block * * - preserves first word * * - X: source data (RAM/ROM) * * - Y: destination (EEPROM) * * - interrupts should be disabled * * - A: preserved * * - WRITES MUST BE LONG WORD ALIGNED!! * * - this routine should be less than COP timeout: probably 1 sec * ****************************************************************************** WRITE_EEPROM_WORD_2ND PSHA JSR COP_SERVICE brclr ECLKDIV,#EDIVLD,EEPROM_W2ND_exit ;abort if clock divider not set movw -2,y,-2,y ; store original data in first word; zzz!!! allowed? movb #SEC_MOD,ECMD ; sector modify command (erase 4B, write 2B) movb #CBEIF,ESTAT ; start the command by writing a 1 to CBEIF. ldaa ESTAT ; check to see if there was a problem executing ; the command. bita #PVIOL+ ACCERR ; if either the PVIOL or ACCERR bit is set, bne EEPROM_W_exit ; return. movw 0,x,0,y ; write new word to 2nd word in eeprom sector movb #PROG,ECMD ; sector modify command (erase 4B, write 2B) movb #CBEIF,ESTAT ; start the command by writing a 1 to CBEIF. ldaa ESTAT ; check to see if there was a problem executing ; the command. bita #PVIOL+ ACCERR ; if either the PVIOL or ACCERR bit is set, bne EEPROM_W_exit ; return. brclr ESTAT,#CBEIF,* ; wait here till the command buffer is empty. brclr ESTAT,#CCIF,* EEPROM_W2ND_exit JSR COP_SERVICE PULA RTS ****************************************************************************** |
