# Cwarrior: RTI timing off

Started by November 17, 2003
 We're using codewarrior to simulate code written for the D60A. We set up the real-time interrupt to run at 8.196 ms using the following logic: Assuming a crystal frequency of 8MHz, the Xclock should be 1/2 this rate with the slow clock set to 1(default). Writing 0x11 to the RTR2-RTR1-RTR0 bits should be a divide by 2^15 or (2e6)/(2^15)2 hz or a period of .008 milliseconds. However, when I sumulate this using the Codewarrior debugger, with an 8MHZ crystal (CPU = 4MHz), the RTI period is 16.192 milliseconds. How can this be?? Stewart Prince Professor, MEch Eng CSUN
 Hello Stuart. I will check the debugger and give you some new asap about this issue. Just to make sure we use the same setup, this is mine: by default (after reset) SLOW=0 => SLWCLK=EXTALi as XCLK=SLWCLK/2, XCLK=EXTALi/2 if EXTALi = 8 MHz, XCLK = 4 MHz 4E6 Hz / 2^15 = 122 Hz => period of 8.196 ms I guess 2e6 here below in your equation is a typo. N.B: the SLOW register (address \$3E) is not simulated with "MC68HC912D60A SAMPLE" generic simulation. Regards, Gilles At 08:55 PM 11/17/2003, you wrote:>We're using codewarrior to simulate code written for the D60A. We set >up the real-time interrupt to run at 8.196 ms using the following logic: > >Assuming a crystal frequency of 8MHz, the Xclock should be 1/2 this rate >with the slow clock set to 1(default). Writing 0x11 to the >RTR2-RTR1-RTR0 bits should be a divide by 2^15 or > >(2e6)/(2^15)2 hz or a period of .008 milliseconds. > > However, when I sumulate this using the Codewarrior debugger, with an >8MHZ crystal (CPU = 4MHz), the RTI period is 16.192 milliseconds. How >can this be?? > >Stewart Prince >Professor, MEch Eng >CSUN > >-------------------- > >">http://docs.yahoo.com/info/terms/