EVB 912DP256 SCI Problems

Started by nealskura July 30, 2002
Hello,

I am currently writing development software for the HCS12 DP256 EVB.
I am trying to test software functionality through SCI data dumps to
a HyperTerminal program running on my workstation.

Currently, I am not getting any input in HyperTerminal. As I trace
through my code with Metrowerks TrueTime Debugger, I don't see the
appropriate changes to the SCI0DRL register as I write to it. I am
not sure if this register is included in the memory map or not. This
is the code I use for SCI0 configuration:

Configuration:
SCI0BDH = 0x00; // ECLK = 8 MHz - Baud Rate = 2400
//CLR 200
SCI0BDL = 0xD0;
//LDAB #208
//STAB 201
SCI0CR1 = 0x00;
//CLR 202
SCI0CR2 = 0x0C; // Set TE and RE
//LDAB #12
//STAB 203

Writing to SCI:
status = SCI0SR1;
//LDAA 204
//STAA status
SCI0DRH = 0x00;
//CLR 206
SCI0DRL = 'C';
//LDAA #67
//STAA 207

The problem could lie within HyperTerminal configuration or the
Serial Port configuration within my PC. But as I am not seeing the
proper resetting of TDRE and TC flags, I suspect the error lies
within the MCU and/or code.

Any assistance would be greatly appreciated.
Thanks.

Neal Skura, E.I.T.
Junior Embedded Software Engineer
Alpha Technologies Ltd.



This works:

*============================================================================

* File: SCI12.ASM
* Func: Serial-I/O via the Serial Communication Interface (SCI0)
* CPU MC9C12DP256
*============================================================================

XDEF Entry,main

ConstSection: SECTION

buffer2: dc 'Type any message less than 80 characters and hit enter:'
CRLF: dc $0d,$0a,0

DataSection: SECTION

buffer1: ds 80

CodeSection: SECTION

Entry:

PORTA equ $0000 ; Port A Register
PORTB equ $0001 ; Port B Register
DDRA equ $0002 ; Port A Data Direction Register
DDRB equ $0003 ; Port B Data Direction Register

COPCTL equ $003c ; COP Control Register

SC0BDH equ $00c8 ; SCI 0 Baud Rate Control Register High
SC0BDL equ $00c9 ; SCI 0 Baud Rate Control Register Low
SC0CR1 equ $00ca ; SCI 0 Control Register 1
SC0CR2 equ $00cb ; SCI 0 Control Register 2
SC0SR1 equ $00cc ; SCI 0 Status Register 1
SC0SR2 equ $00cd ; SCI 0 Status Register 2
SC0DRH equ $00ce ; SCI 0 Data Register High
SC0DRL equ $00cf ; SCI 0 Data Register Low

main: lds #$1FFF ; set SP to top of RAM
clr COPCTL ; Store zero in COP Control Register
jsr initSCI ; Enable SCI and set to 19200-n-8-1
operating mode
ldy #buffer2 ; point to the beginning of TX buffer
jsr putSTR ; outputs a NULL terminated character
string
loop: ldx #buffer1 ; point to the beginning of RC buffer
jsr getSTR ; reads a CR terminated character
string
ldy #buffer1
jsr putSTR ; outputs the character string
ldy #CRLF
jsr putSTR ; outputs CR
bra loop

PAGE

*========================================================================================

; Initialize SCI (19200 Baud, 8N1, Polling Mode) (8 MHz clock rate)
;----------------

initSCI movw #$001a,SC0BDH ;baudrate 19200 ($0034 for 9600, $001a
for 19200, $000d for 38400)
movb #$00,SC0CR1 ;loop mode disabled, 8,1,n
movb #$0c,SC0CR2 ;transmitter & receiver enabled, sci
irq disabled
rts

*========================================================================================

; Test if any character available (received)
; Return: A = 0 (Z = 1) -> no char
; A <> 0 (Z = 0) -> char available
;----------------

testSCI ldaa SC0SR1 ; read status
anda #$20 ; receive data reg full?
rts ; returns 0, if no data

*========================================================================================

; Get character from SCI (wait for)
; Return: A = char
;----------------

getSCI brclr SC0SR1,$20,getSCI ; receive data reg full?
ldaa SC0DRL ; read out data
rts

*========================================================================================

; Send a character via SCI
; Argument: A = char
;----------------

putSCI brclr SC0SR1,$80,putSCI ; transmit data reg empty?
staa SC0DRL ; send data
rts

*========================================================================================

; Input a CR terminated character string, add NULL in memory
; Argument: register X points to string in memory
;----------------

getSTR0 staa 1,X+ ; Auto increment Y by one
getSTR jsr getSCI
cmpa #$0d ; If not a CR character, save it
bne getSTR0
movb #$0,0,X ; add a NULL character
rts

*========================================================================================

; Output a Null terminated character string
; Argument: register Y points to string in memory
;----------------

putSTR0 jsr putSCI
putSTR ldaa 1,Y+ ; Auto increment Y by one
bne putSTR0 ; If not a NULL character, send it
rts

*========================================================================================

PAGE

BRA main Peter nealskura wrote:

> Hello,
>
> I am currently writing development software for the HCS12 DP256 EVB.
> I am trying to test software functionality through SCI data dumps to
> a HyperTerminal program running on my workstation.
>
> Currently, I am not getting any input in HyperTerminal. As I trace
> through my code with Metrowerks TrueTime Debugger, I don't see the
> appropriate changes to the SCI0DRL register as I write to it. I am
> not sure if this register is included in the memory map or not. This
> is the code I use for SCI0 configuration:
>
> Configuration:
> SCI0BDH = 0x00; // ECLK = 8 MHz - Baud Rate = 2400
> //CLR 200
> SCI0BDL = 0xD0;
> //LDAB #208
> //STAB 201
> SCI0CR1 = 0x00;
> //CLR 202
> SCI0CR2 = 0x0C; // Set TE and RE
> //LDAB #12
> //STAB 203
>
> Writing to SCI:
> status = SCI0SR1;
> //LDAA 204
> //STAA status
> SCI0DRH = 0x00;
> //CLR 206
> SCI0DRL = 'C';
> //LDAA #67
> //STAA 207
>
> The problem could lie within HyperTerminal configuration or the
> Serial Port configuration within my PC. But as I am not seeing the
> proper resetting of TDRE and TC flags, I suspect the error lies
> within the MCU and/or code.
>
> Any assistance would be greatly appreciated.
> Thanks.
>
> Neal Skura, E.I.T.
> Junior Embedded Software Engineer
> Alpha Technologies Ltd. > -------------------- >
> ">http://docs.yahoo.com/info/terms/

--

Dr. Peter Freyer
Universitsklinikum
RWTH Aachen
Institut f Biochemie
Pauwelsstrasse 30
D-52074 Aachen, Germany

Telefon: 49-(0)-241-8088834
Telefax: 49-(0)-241-8082428
E-Mail:


Problem solved. I did a little investigative engineering and found
that the serial cable I was using was flaky, at best. Replaced the
cable and haven't had anymore problems.
Thanks for trying to help, Peter.

Neal --- In 68HC12@y..., "nealskura" <nskura@a...> wrote:
> Hello,
>
> I am currently writing development software for the HCS12 DP256
EVB.
> I am trying to test software functionality through SCI data dumps
to
> a HyperTerminal program running on my workstation.
>
> Currently, I am not getting any input in HyperTerminal. As I trace
> through my code with Metrowerks TrueTime Debugger, I don't see the
> appropriate changes to the SCI0DRL register as I write to it. I am
> not sure if this register is included in the memory map or not.
This
> is the code I use for SCI0 configuration:
>
> Configuration:
> SCI0BDH = 0x00; // ECLK = 8 MHz - Baud Rate = 2400
> //CLR 200
> SCI0BDL = 0xD0;
> //LDAB #208
> //STAB 201
> SCI0CR1 = 0x00;
> //CLR 202
> SCI0CR2 = 0x0C; // Set TE and RE
> //LDAB #12
> //STAB 203
>
> Writing to SCI:
> status = SCI0SR1;
> //LDAA 204
> //STAA status
> SCI0DRH = 0x00;
> //CLR 206
> SCI0DRL = 'C';
> //LDAA #67
> //STAA 207
>
> The problem could lie within HyperTerminal configuration or the
> Serial Port configuration within my PC. But as I am not seeing the
> proper resetting of TDRE and TC flags, I suspect the error lies
> within the MCU and/or code.
>
> Any assistance would be greatly appreciated.
> Thanks.
>
> Neal Skura, E.I.T.
> Junior Embedded Software Engineer
> Alpha Technologies Ltd.