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Hi, has anyone got a figure on the life expectancy of the Atmel AT45 serial flash devices? I cant find any thing related to the amount of write cycles allowed. Frank ----- Original Message ----- From: "manekb2000" <> To: <> Sent: Thursday, June 03, 2004 1:07 AM Subject: [68HC12] Re: Problem with SPI > > Below is my transmit/receive routine for the AT45, it is a pretty > generic > > routine that I have used for a few SPI interfaces. > ... > > Great thanx Graham, it's work very good. > > Mariusz > --------------------To learn more about Motorola Microcontrollers, please visit > http://www.motorola.com/mcu > o learn more about Motorola Microcontrollers, please visit > http://www.motorola.com/mcu > > Yahoo! Groups Links |
Re: Problem with SPI
Started by ●June 3, 2003
Reply by ●May 27, 20042004-05-27
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I want to use SPI0 on MC9S12A64 but it doesn't work. SCK(pin 70) and MOSI(pin 71) is still low. It's my simple routine: //Init SPI SPI0BR = 0x11; SPI0CR2 = 0x00; SPI0CR1 = 0x14; SPE_0=True; asm nop; asm nop; asm nop; tmp = SPI0SR; tmp = SPI0DR; //Transfer byte while(!SPTEF_0); SPI0DR = 0x57; //Read byte while(!SPIF_0); tmp = SPI0DR; Where is problem? Can you help me? Mariusz |
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Reply by ●May 27, 20042004-05-27
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Hi Mariusz, you need to enable SPI, i.e. set the SPE bit in SPI0CR1. The meaning of > SPE_0=True; is not possible to comprehend without having additional information. Happy HCS12ing! Oliver > I want to use SPI0 on MC9S12A64 but it doesn't work. > SCK(pin 70) and MOSI(pin 71) is still low. > > It's my simple routine: > > //Init SPI > SPI0BR = 0x11; > SPI0CR2 = 0x00; > SPI0CR1 = 0x14; > SPE_0=True; > asm nop; > asm nop; > asm nop; > tmp = SPI0SR; > tmp = SPI0DR; > > //Transfer byte > while(!SPTEF_0); > SPI0DR = 0x57; > > //Read byte > while(!SPIF_0); > tmp = SPI0DR; > > Where is problem? Can you help me? > > Mariusz > > > --------------------To learn more about Motorola Microcontrollers, please visit > http://www.motorola.com/mcu > o learn more about Motorola Microcontrollers, please visit > http://www.motorola.com/mcu > > Yahoo! Groups Links > > |
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Reply by ●May 28, 20042004-05-28
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Hi Oliver, I enable SPI in line: SPE_0=True; // => SPI0CR1|=0x40 If I set: SPI0CR1 = 0x54; SPI doesn't work too... >Happy HCS12ing! thanx :o) > I want to use SPI0 on MC9S12A64 but it doesn't work. > SCK(pin 70) and MOSI(pin 71) is still low. > > It's my simple routine: > > //Init SPI > SPI0BR = 0x11; > SPI0CR2 = 0x00; > SPI0CR1 = 0x14; > SPE_0=True; > asm nop; > asm nop; > asm nop; > tmp = SPI0SR; > tmp = SPI0DR; > > //Transfer byte > while(!SPTEF_0); > SPI0DR = 0x57; > > //Read byte > while(!SPIF_0); > tmp = SPI0DR; > > Where is problem? Can you help me? > > Mariusz > > > --------------------To learn more about Motorola Microcontrollers, please visit > http://www.motorola.com/mcu > o learn more about Motorola Microcontrollers, please visit > http://www.motorola.com/mcu > > Yahoo! Groups Links > > --------------------To learn more about Motorola Microcontrollers, please visit http://www.motorola.com/mcu o learn more about Motorola Microcontrollers, please visit http://www.motorola.com/mcu Yahoo! Groups Links To |
Reply by ●May 28, 20042004-05-28
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I found my mistake, I don't define MODRR register... Thanx for help ! Can somebody connect the Atmel's DataFlash to the SPI in HCS12? How I can to configure SPI0CR1 for this chip (CPOL, CPHA)? Where I can find any example for this ? Mariusz > Hi Mariusz, > > you need to enable SPI, i.e. set the SPE bit in SPI0CR1. > The meaning of > > > SPE_0=True; > > is not possible to comprehend without having additional information. > > Happy HCS12ing! > Oliver |
Reply by ●May 28, 20042004-05-28
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Hi Mariusz This is my SPI configuration for the Atmel AT45DB161B Data flash. //SPI0 DDRS |= 0xE0; // SPI1 MOSI, SCLK and SS setup as output pins and MISO as input on Port H SPI0BR = 0x03; // Set baud rate prescaler to 16, so clock is 1.5MHz from 24MHz E-Clock SPI0CR1 = MSTR; // Configure as Master, no interrrupts, CPOL = 0, CPHA = 0, SS Not used SPI0CR2 = 0x00; x = SPI1SR; // Read Status Register to clear SPIF, stage 1 x = SPI1DR; // Read Data Register to clear SPIF, stage 2 SPI0CR1 |= SPE; // Enable SPI Graham -----Original Message----- From: manekb2000 [mailto:] Sent: 28 May 2004 11:02 To: Subject: [68HC12] Re: Problem with SPI I found my mistake, I don't define MODRR register... Thanx for help ! Can somebody connect the Atmel's DataFlash to the SPI in HCS12? How I can to configure SPI0CR1 for this chip (CPOL, CPHA)? Where I can find any example for this ? Mariusz > Hi Mariusz, > > you need to enable SPI, i.e. set the SPE bit in SPI0CR1. > The meaning of > > > SPE_0=True; > > is not possible to comprehend without having additional information. > > Happy HCS12ing! > Oliver --------------------To learn more about Motorola Microcontrollers, please visit http://www.motorola.com/mcu <http://www.motorola.com/mcu> o learn more about Motorola Microcontrollers, please visit http://www.motorola.com/mcu <http://www.motorola.com/mcu <http://rd.yahoo.com/SIG9rlub2q/M)5196.4901138.6071305.3001176/D=groups /S06554205:HM/EXP85824953/A!28215/R=0/SIGse96mf6/*http://companio n.yahoo.com> click here <http://us.adserver.yahoo.com/l?M)5196.4901138.6071305.3001176/D=groups/S= :HM/A!28215/randR9990829> _____ > Service. ********************************************************************** This message contains confidential information and is intended only for the individual named. If you are not the named addressee you should not disseminate, distribute or copy this e-mail. Please notify the sender immediately by e-mail if you have received this e-mail by mistake and delete this e-mail from your system. Although BERU F1 SYSTEMS believe this e-mail and any attachments are free of any virus or other defect which may affect a computer, it is the responsibility of the recipient to ensure that it is virus free and BERU F1 SYSTEMS do not accept any responsibility for any loss or damage arising in any way from its use. This footnote confirms that this email message has been swept by MAIL Sweeper. ********************************************************************** |
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Reply by ●May 28, 20042004-05-28
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Thanx for help, it's work! Now only wrestling by memory side... > This is my SPI configuration for the Atmel AT45DB161B Data flash. > > //SPI0 > DDRS |= 0xE0; > // SPI1 MOSI, SCLK and SS setup as output pins and MISO as input on Port H > > SPI0BR = 0x03; > // Set baud rate prescaler to 16, so clock is 1.5MHz from 24MHz E- Clock > SPI0CR1 = MSTR; > // Configure as Master, no interrrupts, CPOL = 0, CPHA = 0, SS Not used > SPI0CR2 = 0x00; > > x = SPI1SR; > // Read Status Register to clear SPIF, stage 1 > x = SPI1DR; > // Read Data Register to clear SPIF, stage 2 > > SPI0CR1 |= SPE; > // Enable SPI > Graham |
Reply by ●May 28, 20042004-05-28
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Hi, Yep, quite a drag to implement but the internal buffer comes in very handy. I assume that you have a 5V to 3V translator on this device. ----- Original Message ----- From: "manekb2000" <> To: <> Sent: Friday, May 28, 2004 5:04 AM Subject: [68HC12] Re: Problem with SPI > Thanx for help, it's work! > Now only wrestling by memory side... > > > This is my SPI configuration for the Atmel AT45DB161B Data flash. > > > > //SPI0 > > DDRS |= 0xE0; > > // SPI1 MOSI, SCLK and SS setup as output pins and MISO as input on > Port H > > > > SPI0BR = 0x03; > > // Set baud rate prescaler to 16, so clock is 1.5MHz from 24MHz E- > Clock > > SPI0CR1 = MSTR; > > // Configure as Master, no interrrupts, CPOL = 0, CPHA = 0, SS Not > used > > SPI0CR2 = 0x00; > > > > x = SPI1SR; > > // Read Status Register to clear SPIF, stage 1 > > x = SPI1DR; > > // Read Data Register to clear SPIF, stage 2 > > > > SPI0CR1 |= SPE; > > // Enable SPI > > > > > > Graham > --------------------To learn more about Motorola Microcontrollers, please visit > http://www.motorola.com/mcu > o learn more about Motorola Microcontrollers, please visit > http://www.motorola.com/mcu > > Yahoo! Groups Links |
Reply by ●June 1, 20042004-06-01
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Hi I still have a problem with communications S12A64 with AT45DB041B. After init: DDRM|=0x38; DDRM&=~0x04; PTM=0x10; MODRR=0x10; SPI0BR=0x00; SPI0CR1=0x10; SPI0CR2=0x00; tmp=SPI0SR; tmp=SPI0DR; SPI0CR1|=0x40; I read status register: while(!SPTEF_0); SPI0DR = 0xD7; while(!SPIF_0); status=SPI0DR; First value of status register is wrong - 0xff, the next is o.k. - 0x9c. I don't understand why? When I read memory (continuous array read): //write opcode while(!SPTEF_0); SPI0DR = 0xE8; //write adress 0 and don't care bytes for(i=0;i<7;i++) { while(!SPTEF_0); SPI0DR = 0x00; } //read byte from memory while(!SPIF_0); *data++ = SPI0DR; first reading byte is the same value that status register - 0x9c, but next reading stop at while(!SPIF_0); Where is error? Can somebody help me? Regards Mariusz |
Reply by ●June 1, 20042004-06-01
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----- Original Message ----- From: "manekb2000" To: <> Sent: Tuesday, June 01, 2004 3:25 PM Subject: [68HC12] Re: Problem with SPI > Hi > > I still have a problem with communications S12A64 with AT45DB041B. > After init: [skip] > I read status register: > while(!SPTEF_0); > SPI0DR = 0xD7; > while(!SPIF_0); > status=SPI0DR; > > First value of status register is wrong - 0xff, the next is o.k. - > 0x9c. I don't understand why? My speculations: First time SPIF was set - AT45 had your 0xD7 shifted in and was ready to shift out status byte on next write to SPIDR. > When I read memory (continuous array read): > //write opcode > while(!SPTEF_0); > SPI0DR = 0xE8; > //write adress 0 and don't care bytes > for(i=0;i<7;i++) > { > while(!SPTEF_0); > SPI0DR = 0x00; > } S12SPI is double buffered. This means - if master mode spi transmitter is idle (no SCK pulses) - SPTEF will get set almost immediately after write to SPIDR. And this means your for loop only buffered 7 zeroes for transmission. 6th zero is currently being transmitted and 7th is sheduled to be transmitted as soon as possible. > //read byte from memory > while(!SPIF_0); SPIF gets set after transfer is complete. Last time SPI module was trying to set SPIF - was after 6th zero was transferred. > *data++ = SPI0DR; Here you are trying to read from SPI0DR what AT45xx was shifting on 6th zero OR, if SCK clock is quite fast and you have interrupts enabled - you may be trying to read what ATxx was shifting on 7th zero. > first reading byte is the same value that status register - 0x9c, > but next reading stop at while(!SPIF_0); You have to write to SPIDR to receive something from slave device. CPU didn't hang on first while(!SPIF) because you were sending zeroes and didn't clear SPIF. Try to lower SCK clock - and CPU should be able to read 2 bytes before hanging on while(!SPIF). > > Where is error? Can somebody help me? Try to replace all SPTEFs with SPIFs, add missing writes to SPIDR, read erratas... Edward > Regards > Mariusz |
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