Re: ECT - Pulse accu / Holding register - accessing ICSYS once in a session!

Started by Daniel White January 20, 2005
...where was this list I saw on this hcs12 mailing list for
registers only to be written one time with 1 compound init value,
not multiple accessing them by bit ORing them...? Christian,
This was the list that Oliver Betz sent a while back. I don't think anyone
added to the list since that time.

-----Original Message-----
From: Oliver Betz [mailto:]
Sent: Tuesday, November 23, 2004 9:10 AM
Subject: [68HC12] List of "write once" registers in HCS12 derivatives
Hello All,

is there an exhaustive list of "write once" registers in HCS12

The modular documentation makes it very hard to find all places, and
one can't even rely on searching the "write once" phrase.

I know so far:

INITEE ("on some devices") with the exception of the EEON bit
MODE (several restrictions)
EBICTL (External Bus Interface Control Register): ESTR
IRQCR (IRQ Control Register): IRQE - IRQ Select Edge Sensitive Only
PEAR: with the exception of the NECLK bit
PLLCTL: SCME - Self Clock Mode Enable Bit
COPCTL (CRG COP Control Register)
ECLKDIV (EEPROM Clock Divider Register)
FCLKDIV (Flash Clock Divider Register)
CANCTL1 MSCAN Control 1 Register: CANE - MSCAN Enable
DLCBCR1 (BDLC Control Register 1): CLKS
DLCBARD (BDLC Analog Round Trip Delay Register)
DLCBRSR (BDLC Rate Select Register)
BFPCTLBF (Byteflight Port Control Register): BFEN

Any more?

Oliver Betz, Muenchen Yahoo! Groups Links