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Hi,
I have been using the spi port on MC9S12E128 successfully for some time. I am now working on another target which uses MC9S12DP256B instead. Unfortunately the spi does not work on this other target, which I have two of. I have worked through the erratas for silicon revision 1K79X, and have to dealt with erratas 548, 479, 429, but not 794. I note that the E128 works fine with or without the errata work-arounds included, as you would expect. I use the spi in master mode for input only from an A to D converter. This A/D ADS7809, requires one extra clock pulse, for each completed conversion, and word read out which I generate by toggling the SCK pin with the spi disabled. I then enable the spi, which appears to be running but there is no clock on the sck line. It is as if the pim has grabbed the SCK pin in the case of the MC9S12DP256B, but not in the case of the MC9S12E128. What do you think is the solution? -- Andrew Lohmann AMIIE Design Engineer PLEASE NOTE NEW EMAIL ADDRESS IS: Bellingham + Stanley Ltd. Longfield Road, Tunbridge Wells, Kent, TN2 3EY, England. Tel: +44 (0) 1892 500400 Fax: +44 (0) 1892 543115 Website: www.bs-ltd.com -----------------------------Disclaimer----------------------------- This communication contains information which is confidential and may also be privileged. It is for the exclusive use of the addressee. If you are not the addressee please note that any distribution, reproduction, copying, publication or use of this communication or the information is prohibited. If you have received this communication in error, please contact us immediately and also delete the communication from your computer. We accept no liability for any loss or damage suffered by any person arising from use of this e-mail. -----------------------------Disclaimer----------------------------- |
SPI on MC9S12DP256B
Started by ●March 21, 2005
Reply by ●March 21, 20052005-03-21
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Hi, I'd look at how different are PIMs of E128 and DP256B. MODRR is read only, so I'd verify first if MODRR accepts the port mapping you want. Aren't you using default MODRR value? BTW is it faster to bidbang extra SCK pulse to ADS7809 rather than to perform 8bit SPI transfer? Edward ----- Original Message ----- From: "Andrew Lohmann" <> To: "68HC12 yahoogroups.com" <> Sent: Monday, March 21, 2005 6:35 PM Subject: [68HC12] SPI on MC9S12DP256B > > Hi, > I have been using the spi port on MC9S12E128 successfully for some time. > I am now working on another target which uses MC9S12DP256B instead. > Unfortunately the spi does not work on this other target, which I have > two of. I have worked through the erratas for silicon revision 1K79X, > and have to dealt with erratas 548, 479, 429, but not 794. I note that > the E128 works fine with or without the errata work-arounds included, as > you would expect. > > I use the spi in master mode for input only from an A to D converter. > This A/D ADS7809, requires one extra clock pulse, for each completed > conversion, and word read out which I generate by toggling the SCK pin > with the spi disabled. I then enable the spi, which appears to be > running but there is no clock on the sck line. It is as if the pim has > grabbed the SCK pin in the case of the MC9S12DP256B, but not in the case > of the MC9S12E128. > > What do you think is the solution? > > -- > Andrew Lohmann AMIIE > Design Engineer > > PLEASE NOTE NEW EMAIL ADDRESS IS: > Bellingham + Stanley Ltd. > Longfield Road, Tunbridge Wells, Kent, TN2 3EY, England. > Tel: +44 (0) 1892 500400 > Fax: +44 (0) 1892 543115 > Website: www.bs-ltd.com > -----------------------------Disclaimer----------------------------- > > This communication contains information which is confidential and may also > be privileged. It is for the exclusive use of the addressee. If you are > not the addressee please note that any distribution, reproduction, > copying, publication or use of this communication or the information is > prohibited. If you have received this communication in error, please > contact us immediately and also delete the communication from your > computer. We accept no liability for any loss or damage suffered by any > person arising from use of this e-mail. > > -----------------------------Disclaimer----------------------------- > > > Yahoo! Groups Links > > |
Reply by ●March 22, 20052005-03-22
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> What do you think is the solution? SPI0 add a 10K pullup on SS* pin PS7. Same for the other SPIs if you are using them. SPI1 same at PH3 SPI2 same at PH7 --- In , Andrew Lohmann <andrew.lohmann@b...> wrote: > Hi, > I have been using the spi port on MC9S12E128 successfully for some time. > I am now working on another target which uses MC9S12DP256B instead. > Unfortunately the spi does not work on this other target, which I have > two of. I have worked through the erratas for silicon revision 1K79X, > and have to dealt with erratas 548, 479, 429, but not 794. I note that > the E128 works fine with or without the errata work-arounds included, as > you would expect. > > I use the spi in master mode for input only from an A to D converter. > This A/D ADS7809, requires one extra clock pulse, for each completed > conversion, and word read out which I generate by toggling the SCK pin > with the spi disabled. I then enable the spi, which appears to be > running but there is no clock on the sck line. It is as if the pim has > grabbed the SCK pin in the case of the MC9S12DP256B, but not in the case > of the MC9S12E128. > > What do you think is the solution? > > -- > Andrew Lohmann AMIIE > Design Engineer > > PLEASE NOTE NEW EMAIL ADDRESS IS: > andrew.lohmann@b... > > Bellingham + Stanley Ltd. > Longfield Road, Tunbridge Wells, Kent, TN2 3EY, England. > Tel: +44 (0) 1892 500400 > Fax: +44 (0) 1892 543115 > Website: www.bs-ltd.com > -----------------------------Disclaimer----------------------------- > > This communication contains information which is confidential and may also be privileged. It is for the exclusive use of the addressee. If you are not the addressee please note that any distribution, reproduction, copying, publication or use of this communication or the information is prohibited. If you have received this communication in error, please contact us immediately and also delete the communication from your computer. We accept no liability for any loss or damage suffered by any person arising from use of this e-mail. > > -----------------------------Disclaimer----------------------------- |
Reply by ●March 22, 20052005-03-22
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Thanks for both replies. I have the pull-up turned on but had not discovered MODRR register. The point on the single extra clock pulse is that it is needs to be at the beginning, so that 16 bit data is returned correctly shifted in. The AD977, LTC1609, or ADS7809 converters are a bit unusual as they need 17 clock pulses not 16 to read at the result. Andrew Edward Karpicz wrote: > Hi, > > I'd look at how different are PIMs of E128 and DP256B. MODRR is read only, > so I'd verify first if MODRR accepts the port mapping you want. Aren't you > using default MODRR value? > BTW is it faster to bidbang extra SCK pulse to ADS7809 rather than to > perform 8bit SPI transfer? > > Edward > > ----- Original Message ----- > From: "Andrew Lohmann" <> > To: "68HC12 yahoogroups.com" <> > Sent: Monday, March 21, 2005 6:35 PM > Subject: [68HC12] SPI on MC9S12DP256B > > > > Hi, > > > > > > I have been using the spi port on MC9S12E128 successfully for some time. > > I am now working on another target which uses MC9S12DP256B instead. > > Unfortunately the spi does not work on this other target, which I have > > two of. I have worked through the erratas for silicon revision 1K79X, > > and have to dealt with erratas 548, 479, 429, but not 794. I note that > > the E128 works fine with or without the errata work-arounds included, as > > you would expect. > > > > I use the spi in master mode for input only from an A to D converter. > > This A/D ADS7809, requires one extra clock pulse, for each completed > > conversion, and word read out which I generate by toggling the SCK pin > > with the spi disabled. I then enable the spi, which appears to be > > running but there is no clock on the sck line. It is as if the pim has > > grabbed the SCK pin in the case of the MC9S12DP256B, but not in the case > > of the MC9S12E128. > > > > What do you think is the solution? > > > > -- > > Andrew Lohmann AMIIE > > Design Engineer > > > > zeta_alpha2002 wrote: > > What do you think is the solution? > > SPI0 add a 10K pullup on SS* pin PS7. Same for the other SPIs if you > are using them. > > SPI1 same at PH3 > SPI2 same at PH7 > --- In , Andrew Lohmann <andrew.lohmann@b...> wrote: > > Hi, > > > > > > I have been using the spi port on MC9S12E128 successfully for some > time. > > I am now working on another target which uses MC9S12DP256B instead. > > Unfortunately the spi does not work on this other target, which I have > > two of. I have worked through the erratas for silicon revision 1K79X, > > and have to dealt with erratas 548, 479, 429, but not 794. I note that > > the E128 works fine with or without the errata work-arounds > included, as > > you would expect. > > > > I use the spi in master mode for input only from an A to D converter. > > This A/D ADS7809, requires one extra clock pulse, for each completed > > conversion, and word read out which I generate by toggling the SCK pin > > with the spi disabled. I then enable the spi, which appears to be > > running but there is no clock on the sck line. It is as if the pim has > > grabbed the SCK pin in the case of the MC9S12DP256B, but not in the > case > > of the MC9S12E128. > > > > What do you think is the solution? > > > > -- > > Andrew Lohmann AMIIE > > -----------------------------Disclaimer----------------------------- This communication contains information which is confidential and may also be privileged. It is for the exclusive use of the addressee. If you are not the addressee please note that any distribution, reproduction, copying, publication or use of this communication or the information is prohibited. If you have received this communication in error, please contact us immediately and also delete the communication from your computer. We accept no liability for any loss or damage suffered by any person arising from use of this e-mail. -----------------------------Disclaimer----------------------------- |
Reply by ●March 22, 20052005-03-22
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Hi, Correction: I used to think MODRR is read only. If fact it isn't, sorry. Edward ----- Original Message ----- From: "Andrew Lohmann" <> To: <> Sent: Tuesday, March 22, 2005 12:41 PM Subject: Re: [68HC12] SPI on MC9S12DP256B > > Thanks for both replies. I have the pull-up turned on but had not > discovered MODRR register. The point on the single extra clock pulse is > that it is needs to be at the beginning, so that 16 bit data is returned > correctly shifted in. The AD977, LTC1609, or ADS7809 converters are a > bit unusual as they need 17 clock pulses not 16 to read at the result. > > Andrew > Edward Karpicz wrote: > >> Hi, >> >> I'd look at how different are PIMs of E128 and DP256B. MODRR is read >> only, >> so I'd verify first if MODRR accepts the port mapping you want. Aren't >> you >> using default MODRR value? >> BTW is it faster to bidbang extra SCK pulse to ADS7809 rather than to >> perform 8bit SPI transfer? >> >> Edward >> >> ----- Original Message ----- >> From: "Andrew Lohmann" <> >> To: "68HC12 yahoogroups.com" <> >> Sent: Monday, March 21, 2005 6:35 PM >> Subject: [68HC12] SPI on MC9S12DP256B >> >> >> > >> > Hi, >> > >> > >> > I have been using the spi port on MC9S12E128 successfully for some >> > time. >> > I am now working on another target which uses MC9S12DP256B instead. >> > Unfortunately the spi does not work on this other target, which I have >> > two of. I have worked through the erratas for silicon revision 1K79X, >> > and have to dealt with erratas 548, 479, 429, but not 794. I note that >> > the E128 works fine with or without the errata work-arounds included, >> > as >> > you would expect. >> > >> > I use the spi in master mode for input only from an A to D converter. >> > This A/D ADS7809, requires one extra clock pulse, for each completed >> > conversion, and word read out which I generate by toggling the SCK pin >> > with the spi disabled. I then enable the spi, which appears to be >> > running but there is no clock on the sck line. It is as if the pim has >> > grabbed the SCK pin in the case of the MC9S12DP256B, but not in the >> > case >> > of the MC9S12E128. >> > >> > What do you think is the solution? >> > >> > -- >> > Andrew Lohmann AMIIE >> > Design Engineer >> > >> > zeta_alpha2002 wrote: >> > What do you think is the solution? >> >> SPI0 add a 10K pullup on SS* pin PS7. Same for the other SPIs if you >> are using them. >> >> SPI1 same at PH3 >> SPI2 same at PH7 >> >> >> --- In , Andrew Lohmann <andrew.lohmann@b...> >> wrote: >> > Hi, >> > >> > >> > I have been using the spi port on MC9S12E128 successfully for some >> time. >> > I am now working on another target which uses MC9S12DP256B instead. >> > Unfortunately the spi does not work on this other target, which I have >> > two of. I have worked through the erratas for silicon revision 1K79X, >> > and have to dealt with erratas 548, 479, 429, but not 794. I note that >> > the E128 works fine with or without the errata work-arounds >> included, as >> > you would expect. >> > >> > I use the spi in master mode for input only from an A to D converter. >> > This A/D ADS7809, requires one extra clock pulse, for each completed >> > conversion, and word read out which I generate by toggling the SCK pin >> > with the spi disabled. I then enable the spi, which appears to be >> > running but there is no clock on the sck line. It is as if the pim has >> > grabbed the SCK pin in the case of the MC9S12DP256B, but not in the >> case >> > of the MC9S12E128. >> > >> > What do you think is the solution? >> > >> > -- >> > Andrew Lohmann AMIIE >> > -----------------------------Disclaimer----------------------------- > > This communication contains information which is confidential and may also > be privileged. It is for the exclusive use of the addressee. If you are > not the addressee please note that any distribution, reproduction, > copying, publication or use of this communication or the information is > prohibited. If you have received this communication in error, please > contact us immediately and also delete the communication from your > computer. We accept no liability for any loss or damage suffered by any > person arising from use of this e-mail. > > -----------------------------Disclaimer----------------------------- > > > Yahoo! Groups Links > > |
