Greeting to everyone. I am newbie on AT91SAM. I need your suggest on my project.
I am using AT91SAM9260-EK board as master SPI to communicate with 16 16-bits
ADCs as slave SPI. For single ADC, I can communicate with it as following order:
set CS pin low level, generate SCLK clock signal with SPI_Write(), read data
from ADC with SPI_Read(), and then set CS high level. This process takes about
50us. MY question is: do I have to repeat above process for each ADC? It will
take over 800us, that is too long for my application. There will be significant
delay between 1st ADC and 16th ADC. Ideally, all ADCs should be samples at the
same time although the data can be transferred in serial order.
I really appreciate your helps,
ysc.
need help on SPI
Started by ●July 27, 2009
Reply by ●July 27, 20092009-07-27
--- In A..., yschen_u@... wrote:
>
> Greeting to everyone. I am newbie on AT91SAM. I need your suggest on my project. I am using AT91SAM9260-EK board as master SPI to communicate with 16 16-bits ADCs as slave SPI. For single ADC, I can communicate with it as following order: set CS pin low level, generate SCLK clock signal with SPI_Write(), read data from ADC with SPI_Read(), and then set CS high level. This process takes about 50us. MY question is: do I have to repeat above process for each ADC? It will take over 800us, that is too long for my application. There will be significant delay between 1st ADC and 16th ADC. Ideally, all ADCs should be samples at the same time although the data can be transferred in serial order.
>
> I really appreciate your helps,
>
> ysc.
If you need multiple inputs to sample simultaneously, you need either multiple sample and hold buffers or multiple ADCs. The SAM9 has a single ADC with a multiplexer. So it will never be able to sample multiple inputs at one time.
Rick
>
> Greeting to everyone. I am newbie on AT91SAM. I need your suggest on my project. I am using AT91SAM9260-EK board as master SPI to communicate with 16 16-bits ADCs as slave SPI. For single ADC, I can communicate with it as following order: set CS pin low level, generate SCLK clock signal with SPI_Write(), read data from ADC with SPI_Read(), and then set CS high level. This process takes about 50us. MY question is: do I have to repeat above process for each ADC? It will take over 800us, that is too long for my application. There will be significant delay between 1st ADC and 16th ADC. Ideally, all ADCs should be samples at the same time although the data can be transferred in serial order.
>
> I really appreciate your helps,
>
> ysc.
If you need multiple inputs to sample simultaneously, you need either multiple sample and hold buffers or multiple ADCs. The SAM9 has a single ADC with a multiplexer. So it will never be able to sample multiple inputs at one time.
Rick
Reply by ●July 27, 20092009-07-27
Hi,
It seems that you would like to synchronize your 16 ADCs.
As you do not tell us which ADC you are using, I suggest you 2 possibilities :
1) Some converters have an external input to start the conversion.
2) Some converters use the first SPI byte to start the conversion.
Try to send the same SPI command to ALL your ADCs, by setting CS low for all converter.
Then, read the conversion results one by one. In this case, you'll have to put CS high for the others ADCs,
and I don't know if you are going to loose the values.
Eric.
----- Original Message -----
From: y...@yahoo.com
To: A...
Sent: Monday, July 27, 2009 6:01 AM
Subject: [AT91SAM] need help on SPI
Greeting to everyone. I am newbie on AT91SAM. I need your suggest on my project. I am using AT91SAM9260-EK board as master SPI to communicate with 16 16-bits ADCs as slave SPI. For single ADC, I can communicate with it as following order: set CS pin low level, generate SCLK clock signal with SPI_Write(), read data from ADC with SPI_Read(), and then set CS high level. This process takes about 50us. MY question is: do I have to repeat above process for each ADC? It will take over 800us, that is too long for my application. There will be significant delay between 1st ADC and 16th ADC. Ideally, all ADCs should be samples at the same time although the data can be transferred in serial order.
I really appreciate your helps,
ysc.
It seems that you would like to synchronize your 16 ADCs.
As you do not tell us which ADC you are using, I suggest you 2 possibilities :
1) Some converters have an external input to start the conversion.
2) Some converters use the first SPI byte to start the conversion.
Try to send the same SPI command to ALL your ADCs, by setting CS low for all converter.
Then, read the conversion results one by one. In this case, you'll have to put CS high for the others ADCs,
and I don't know if you are going to loose the values.
Eric.
----- Original Message -----
From: y...@yahoo.com
To: A...
Sent: Monday, July 27, 2009 6:01 AM
Subject: [AT91SAM] need help on SPI
Greeting to everyone. I am newbie on AT91SAM. I need your suggest on my project. I am using AT91SAM9260-EK board as master SPI to communicate with 16 16-bits ADCs as slave SPI. For single ADC, I can communicate with it as following order: set CS pin low level, generate SCLK clock signal with SPI_Write(), read data from ADC with SPI_Read(), and then set CS high level. This process takes about 50us. MY question is: do I have to repeat above process for each ADC? It will take over 800us, that is too long for my application. There will be significant delay between 1st ADC and 16th ADC. Ideally, all ADCs should be samples at the same time although the data can be transferred in serial order.
I really appreciate your helps,
ysc.
Reply by ●July 27, 20092009-07-27
Hi Eric,
I am using 16 external 16-bits ADCs for AT91SAM9260-EK, the ADC is AD7684.
The CS sholud keep low during conversion and data transfer. The AD7684 ADC start the conversion when CS jump from high to low. Then the data shift out with SCLK pulses, and CS jump to high at the end of the transfer.
The 2) case may apply on my project.
The AT91SAM9260-EK can set CS low to all ADCs to start the conversion. The AT91SAM9260-EK generate the SCLK signal by write dummy byte SPI_Write(AT91C_BASE_SPI1, 0, 0xFF). Should this SPI_Write() be sent to all ADCs? If so, whether the data from 16 ADCs will be buffered (total will be 32 bytes)? Because the data from ADC will be shifted out when get SCLK pulses.
Any mechanism in AT91SAM9260-EK can buffer the data from ADC? Can PDC be a help?
Thanks lot for your helps,
ysc.
--- In A..., "Eric Pasquier" wrote:
>
> Hi,
>
> It seems that you would like to synchronize your 16 ADCs.
> As you do not tell us which ADC you are using, I suggest you 2 possibilities :
>
> 1) Some converters have an external input to start the conversion.
>
> 2) Some converters use the first SPI byte to start the conversion.
> Try to send the same SPI command to ALL your ADCs, by setting CS low for all converter.
> Then, read the conversion results one by one. In this case, you'll have to put CS high for the others ADCs,
> and I don't know if you are going to loose the values.
>
> Eric.
>
> ----- Original Message -----
> From: yschen_u@...
> To: A...
> Sent: Monday, July 27, 2009 6:01 AM
> Subject: [AT91SAM] need help on SPI
> Greeting to everyone. I am newbie on AT91SAM. I need your suggest on my project. I am using AT91SAM9260-EK board as master SPI to communicate with 16 16-bits ADCs as slave SPI. For single ADC, I can communicate with it as following order: set CS pin low level, generate SCLK clock signal with SPI_Write(), read data from ADC with SPI_Read(), and then set CS high level. This process takes about 50us. MY question is: do I have to repeat above process for each ADC? It will take over 800us, that is too long for my application. There will be significant delay between 1st ADC and 16th ADC. Ideally, all ADCs should be samples at the same time although the data can be transferred in serial order.
>
> I really appreciate your helps,
>
> ysc.
>
I am using 16 external 16-bits ADCs for AT91SAM9260-EK, the ADC is AD7684.
The CS sholud keep low during conversion and data transfer. The AD7684 ADC start the conversion when CS jump from high to low. Then the data shift out with SCLK pulses, and CS jump to high at the end of the transfer.
The 2) case may apply on my project.
The AT91SAM9260-EK can set CS low to all ADCs to start the conversion. The AT91SAM9260-EK generate the SCLK signal by write dummy byte SPI_Write(AT91C_BASE_SPI1, 0, 0xFF). Should this SPI_Write() be sent to all ADCs? If so, whether the data from 16 ADCs will be buffered (total will be 32 bytes)? Because the data from ADC will be shifted out when get SCLK pulses.
Any mechanism in AT91SAM9260-EK can buffer the data from ADC? Can PDC be a help?
Thanks lot for your helps,
ysc.
--- In A..., "Eric Pasquier" wrote:
>
> Hi,
>
> It seems that you would like to synchronize your 16 ADCs.
> As you do not tell us which ADC you are using, I suggest you 2 possibilities :
>
> 1) Some converters have an external input to start the conversion.
>
> 2) Some converters use the first SPI byte to start the conversion.
> Try to send the same SPI command to ALL your ADCs, by setting CS low for all converter.
> Then, read the conversion results one by one. In this case, you'll have to put CS high for the others ADCs,
> and I don't know if you are going to loose the values.
>
> Eric.
>
> ----- Original Message -----
> From: yschen_u@...
> To: A...
> Sent: Monday, July 27, 2009 6:01 AM
> Subject: [AT91SAM] need help on SPI
> Greeting to everyone. I am newbie on AT91SAM. I need your suggest on my project. I am using AT91SAM9260-EK board as master SPI to communicate with 16 16-bits ADCs as slave SPI. For single ADC, I can communicate with it as following order: set CS pin low level, generate SCLK clock signal with SPI_Write(), read data from ADC with SPI_Read(), and then set CS high level. This process takes about 50us. MY question is: do I have to repeat above process for each ADC? It will take over 800us, that is too long for my application. There will be significant delay between 1st ADC and 16th ADC. Ideally, all ADCs should be samples at the same time although the data can be transferred in serial order.
>
> I really appreciate your helps,
>
> ysc.
>
Reply by ●July 27, 20092009-07-27
Hi,
What is your expected rate ?
Do you need to synchronize all the ADCs ?
Theorically, you need 3 bytes at a maximum SPI clock of 2.9MHz, ie, ~120kps.
With 1 SPI channel, 120/16u00kps.
You need to take into account the exact SPI clock frequency and processing time.
You may connect all CS together, and all DOUT together, but you will have to
multiplex the 16 Clocks with an external circuit.
If you need higher transfert rate, you will have to interface the 16 ADCs with
an external circuit which should present 16x16bits registers to the SPI. May be
with a little FPGA.
Eric.
Selon yschen_u :
> Hi Eric,
>
> I am using 16 external 16-bits ADCs for AT91SAM9260-EK, the ADC is AD7684.
> The CS sholud keep low during conversion and data transfer. The AD7684 ADC
> start the conversion when CS jump from high to low. Then the data shift out
> with SCLK pulses, and CS jump to high at the end of the transfer.
>
> The 2) case may apply on my project.
>
> The AT91SAM9260-EK can set CS low to all ADCs to start the conversion. The
> AT91SAM9260-EK generate the SCLK signal by write dummy byte
> SPI_Write(AT91C_BASE_SPI1, 0, 0xFF). Should this SPI_Write() be sent to all
> ADCs? If so, whether the data from 16 ADCs will be buffered (total will be 32
> bytes)? Because the data from ADC will be shifted out when get SCLK pulses.
>
> Any mechanism in AT91SAM9260-EK can buffer the data from ADC? Can PDC be a
> help?
>
> Thanks lot for your helps,
>
> ysc.
> --- In A..., "Eric Pasquier" wrote:
> >
> > Hi,
> >
> > It seems that you would like to synchronize your 16 ADCs.
> > As you do not tell us which ADC you are using, I suggest you 2
> possibilities :
> >
> > 1) Some converters have an external input to start the conversion.
> >
> > 2) Some converters use the first SPI byte to start the conversion.
> > Try to send the same SPI command to ALL your ADCs, by setting CS low
> for all converter.
> > Then, read the conversion results one by one. In this case, you'll have
> to put CS high for the others ADCs,
> > and I don't know if you are going to loose the values.
> >
> > Eric.
> >
> >
> >
> > ----- Original Message -----
> > From: yschen_u@...
> > To: A...
> > Sent: Monday, July 27, 2009 6:01 AM
> > Subject: [AT91SAM] need help on SPI
> >
> >
> > Greeting to everyone. I am newbie on AT91SAM. I need your suggest on my
> project. I am using AT91SAM9260-EK board as master SPI to communicate with 16
> 16-bits ADCs as slave SPI. For single ADC, I can communicate with it as
> following order: set CS pin low level, generate SCLK clock signal with
> SPI_Write(), read data from ADC with SPI_Read(), and then set CS high level.
> This process takes about 50us. MY question is: do I have to repeat above
> process for each ADC? It will take over 800us, that is too long for my
> application. There will be significant delay between 1st ADC and 16th ADC.
> Ideally, all ADCs should be samples at the same time although the data can be
> transferred in serial order.
> >
> > I really appreciate your helps,
> >
> > ysc.
>
What is your expected rate ?
Do you need to synchronize all the ADCs ?
Theorically, you need 3 bytes at a maximum SPI clock of 2.9MHz, ie, ~120kps.
With 1 SPI channel, 120/16u00kps.
You need to take into account the exact SPI clock frequency and processing time.
You may connect all CS together, and all DOUT together, but you will have to
multiplex the 16 Clocks with an external circuit.
If you need higher transfert rate, you will have to interface the 16 ADCs with
an external circuit which should present 16x16bits registers to the SPI. May be
with a little FPGA.
Eric.
Selon yschen_u :
> Hi Eric,
>
> I am using 16 external 16-bits ADCs for AT91SAM9260-EK, the ADC is AD7684.
> The CS sholud keep low during conversion and data transfer. The AD7684 ADC
> start the conversion when CS jump from high to low. Then the data shift out
> with SCLK pulses, and CS jump to high at the end of the transfer.
>
> The 2) case may apply on my project.
>
> The AT91SAM9260-EK can set CS low to all ADCs to start the conversion. The
> AT91SAM9260-EK generate the SCLK signal by write dummy byte
> SPI_Write(AT91C_BASE_SPI1, 0, 0xFF). Should this SPI_Write() be sent to all
> ADCs? If so, whether the data from 16 ADCs will be buffered (total will be 32
> bytes)? Because the data from ADC will be shifted out when get SCLK pulses.
>
> Any mechanism in AT91SAM9260-EK can buffer the data from ADC? Can PDC be a
> help?
>
> Thanks lot for your helps,
>
> ysc.
> --- In A..., "Eric Pasquier" wrote:
> >
> > Hi,
> >
> > It seems that you would like to synchronize your 16 ADCs.
> > As you do not tell us which ADC you are using, I suggest you 2
> possibilities :
> >
> > 1) Some converters have an external input to start the conversion.
> >
> > 2) Some converters use the first SPI byte to start the conversion.
> > Try to send the same SPI command to ALL your ADCs, by setting CS low
> for all converter.
> > Then, read the conversion results one by one. In this case, you'll have
> to put CS high for the others ADCs,
> > and I don't know if you are going to loose the values.
> >
> > Eric.
> >
> >
> >
> > ----- Original Message -----
> > From: yschen_u@...
> > To: A...
> > Sent: Monday, July 27, 2009 6:01 AM
> > Subject: [AT91SAM] need help on SPI
> >
> >
> > Greeting to everyone. I am newbie on AT91SAM. I need your suggest on my
> project. I am using AT91SAM9260-EK board as master SPI to communicate with 16
> 16-bits ADCs as slave SPI. For single ADC, I can communicate with it as
> following order: set CS pin low level, generate SCLK clock signal with
> SPI_Write(), read data from ADC with SPI_Read(), and then set CS high level.
> This process takes about 50us. MY question is: do I have to repeat above
> process for each ADC? It will take over 800us, that is too long for my
> application. There will be significant delay between 1st ADC and 16th ADC.
> Ideally, all ADCs should be samples at the same time although the data can be
> transferred in serial order.
> >
> > I really appreciate your helps,
> >
> > ysc.
>
Reply by ●July 28, 20092009-07-28
On Monday 27 July 2009 23:21:36 yschen_u wrote:
> Hi Eric,
>
> I am using 16 external 16-bits ADCs for AT91SAM9260-EK, the ADC is AD7684.
> The CS sholud keep low during conversion and data transfer. The AD7684 ADC
> start the conversion when CS jump from high to low. Then the data shift out
> with SCLK pulses, and CS jump to high at the end of the transfer.
>
> The 2) case may apply on my project.
>
> The AT91SAM9260-EK can set CS low to all ADCs to start the conversion. The
> AT91SAM9260-EK generate the SCLK signal by write dummy byte
> SPI_Write(AT91C_BASE_SPI1, 0, 0xFF). Should this SPI_Write() be sent to all
> ADCs? If so, whether the data from 16 ADCs will be buffered (total will be
> 32 bytes)? Because the data from ADC will be shifted out when get SCLK
> pulses.
>
> Any mechanism in AT91SAM9260-EK can buffer the data from ADC? Can PDC be a
> help?
>
> Thanks lot for your helps,
>
You do not mention your ADC connection topology completely nor your conversion
rate. I do not know about AD7648 but I guess you connect 16 ADC end-to-end and
then connect last one to SAM9260.
If this is the case then:
Your AD converters are capable of shifting data to each other. So all you need
is 16 * X bytes where X may be 2,3,4 or whatever. So all you need to do is
sync your ADCs and issue one SPI read/write command to read all data at once.
Your SPI transfer rate and ADC convertion rate will determine how many ADCs
you can connect. So you should adjust SPI transfer rate accordingly. Use of
PDC is optional but definitely useful.
If that is not the case then I wonder if your evalutation kit has a decoder
for CS pins. Otherwise how do you plan to interface 16 ADCs to your 9260?
(Somebody shoot me if 9260 has 16 chip selects.) Other than these questions,
AT91SAM SPI have a feature of automatically asserting CS according to
peripheral address. You can combine this with PDC provided that your ADCs are
synced.
Caglar
> ysc.
>
> --- In A..., "Eric Pasquier" wrote:
> > Hi,
> >
> > It seems that you would like to synchronize your 16 ADCs.
> > As you do not tell us which ADC you are using, I suggest you 2
> > possibilities :
> >
> > 1) Some converters have an external input to start the conversion.
> >
> > 2) Some converters use the first SPI byte to start the conversion.
> > Try to send the same SPI command to ALL your ADCs, by setting CS low
> > for all converter. Then, read the conversion results one by one. In this
> > case, you'll have to put CS high for the others ADCs, and I don't know if
> > you are going to loose the values.
> >
> > Eric.
> >
> >
> >
> > ----- Original Message -----
> > From: yschen_u@...
> > To: A...
> > Sent: Monday, July 27, 2009 6:01 AM
> > Subject: [AT91SAM] need help on SPI
> >
> >
> > Greeting to everyone. I am newbie on AT91SAM. I need your suggest on
> > my project. I am using AT91SAM9260-EK board as master SPI to communicate
> > with 16 16-bits ADCs as slave SPI. For single ADC, I can communicate with
> > it as following order: set CS pin low level, generate SCLK clock signal
> > with SPI_Write(), read data from ADC with SPI_Read(), and then set CS
> > high level. This process takes about 50us. MY question is: do I have to
> > repeat above process for each ADC? It will take over 800us, that is too
> > long for my application. There will be significant delay between 1st ADC
> > and 16th ADC. Ideally, all ADCs should be samples at the same time
> > although the data can be transferred in serial order.
> >
> > I really appreciate your helps,
> >
> > ysc.
> Hi Eric,
>
> I am using 16 external 16-bits ADCs for AT91SAM9260-EK, the ADC is AD7684.
> The CS sholud keep low during conversion and data transfer. The AD7684 ADC
> start the conversion when CS jump from high to low. Then the data shift out
> with SCLK pulses, and CS jump to high at the end of the transfer.
>
> The 2) case may apply on my project.
>
> The AT91SAM9260-EK can set CS low to all ADCs to start the conversion. The
> AT91SAM9260-EK generate the SCLK signal by write dummy byte
> SPI_Write(AT91C_BASE_SPI1, 0, 0xFF). Should this SPI_Write() be sent to all
> ADCs? If so, whether the data from 16 ADCs will be buffered (total will be
> 32 bytes)? Because the data from ADC will be shifted out when get SCLK
> pulses.
>
> Any mechanism in AT91SAM9260-EK can buffer the data from ADC? Can PDC be a
> help?
>
> Thanks lot for your helps,
>
You do not mention your ADC connection topology completely nor your conversion
rate. I do not know about AD7648 but I guess you connect 16 ADC end-to-end and
then connect last one to SAM9260.
If this is the case then:
Your AD converters are capable of shifting data to each other. So all you need
is 16 * X bytes where X may be 2,3,4 or whatever. So all you need to do is
sync your ADCs and issue one SPI read/write command to read all data at once.
Your SPI transfer rate and ADC convertion rate will determine how many ADCs
you can connect. So you should adjust SPI transfer rate accordingly. Use of
PDC is optional but definitely useful.
If that is not the case then I wonder if your evalutation kit has a decoder
for CS pins. Otherwise how do you plan to interface 16 ADCs to your 9260?
(Somebody shoot me if 9260 has 16 chip selects.) Other than these questions,
AT91SAM SPI have a feature of automatically asserting CS according to
peripheral address. You can combine this with PDC provided that your ADCs are
synced.
Caglar
> ysc.
>
> --- In A..., "Eric Pasquier" wrote:
> > Hi,
> >
> > It seems that you would like to synchronize your 16 ADCs.
> > As you do not tell us which ADC you are using, I suggest you 2
> > possibilities :
> >
> > 1) Some converters have an external input to start the conversion.
> >
> > 2) Some converters use the first SPI byte to start the conversion.
> > Try to send the same SPI command to ALL your ADCs, by setting CS low
> > for all converter. Then, read the conversion results one by one. In this
> > case, you'll have to put CS high for the others ADCs, and I don't know if
> > you are going to loose the values.
> >
> > Eric.
> >
> >
> >
> > ----- Original Message -----
> > From: yschen_u@...
> > To: A...
> > Sent: Monday, July 27, 2009 6:01 AM
> > Subject: [AT91SAM] need help on SPI
> >
> >
> > Greeting to everyone. I am newbie on AT91SAM. I need your suggest on
> > my project. I am using AT91SAM9260-EK board as master SPI to communicate
> > with 16 16-bits ADCs as slave SPI. For single ADC, I can communicate with
> > it as following order: set CS pin low level, generate SCLK clock signal
> > with SPI_Write(), read data from ADC with SPI_Read(), and then set CS
> > high level. This process takes about 50us. MY question is: do I have to
> > repeat above process for each ADC? It will take over 800us, that is too
> > long for my application. There will be significant delay between 1st ADC
> > and 16th ADC. Ideally, all ADCs should be samples at the same time
> > although the data can be transferred in serial order.
> >
> > I really appreciate your helps,
> >
> > ysc.
Reply by ●July 28, 20092009-07-28
Hi Caglar,
Just a comment about your post.
<>
I didn't know that it was possible to chain SPI devices.
I don't think this is possible with AD7684 (http://www.analog.com/en/analog-to-digital-converters/ad-converters/ad7684/products/product.html)
< for CS pins. Otherwise how do you plan to interface 16 ADCs to your 9260?
(Somebody shoot me if 9260 has 16 chip selects.) >>
You can easily replace CS with any GPIO pin if you do not use PDC or "automatic chained SPI read".
As you suggest, the best should be the use of an external decoder if you want to save IOs
I suggested to add an FPGA to managed the ADCs and present all the results in one SPI access (16x16 bits).
It will permit to synchronize the 16 converters and to meet up to 100kps rate.
Eric.
----- Original Message -----
From: Caglar Akyuz
To: A...
Sent: Tuesday, July 28, 2009 8:14 AM
Subject: Re: [AT91SAM] Re: need help on SPI
On Monday 27 July 2009 23:21:36 yschen_u wrote:
> Hi Eric,
>
> I am using 16 external 16-bits ADCs for AT91SAM9260-EK, the ADC is AD7684.
> The CS sholud keep low during conversion and data transfer. The AD7684 ADC
> start the conversion when CS jump from high to low. Then the data shift out
> with SCLK pulses, and CS jump to high at the end of the transfer.
>
> The 2) case may apply on my project.
>
> The AT91SAM9260-EK can set CS low to all ADCs to start the conversion. The
> AT91SAM9260-EK generate the SCLK signal by write dummy byte
> SPI_Write(AT91C_BASE_SPI1, 0, 0xFF). Should this SPI_Write() be sent to all
> ADCs? If so, whether the data from 16 ADCs will be buffered (total will be
> 32 bytes)? Because the data from ADC will be shifted out when get SCLK
> pulses.
>
> Any mechanism in AT91SAM9260-EK can buffer the data from ADC? Can PDC be a
> help?
>
> Thanks lot for your helps,
>
You do not mention your ADC connection topology completely nor your conversion
rate. I do not know about AD7648 but I guess you connect 16 ADC end-to-end and
then connect last one to SAM9260.
If this is the case then:
Your AD converters are capable of shifting data to each other. So all you need
is 16 * X bytes where X may be 2,3,4 or whatever. So all you need to do is
sync your ADCs and issue one SPI read/write command to read all data at once.
Your SPI transfer rate and ADC convertion rate will determine how many ADCs
you can connect. So you should adjust SPI transfer rate accordingly. Use of
PDC is optional but definitely useful.
If that is not the case then I wonder if your evalutation kit has a decoder
for CS pins. Otherwise how do you plan to interface 16 ADCs to your 9260?
(Somebody shoot me if 9260 has 16 chip selects.) Other than these questions,
AT91SAM SPI have a feature of automatically asserting CS according to
peripheral address. You can combine this with PDC provided that your ADCs are
synced.
Caglar
> ysc.
>
> --- In A..., "Eric Pasquier" wrote:
> > Hi,
> >
> > It seems that you would like to synchronize your 16 ADCs.
> > As you do not tell us which ADC you are using, I suggest you 2
> > possibilities :
> >
> > 1) Some converters have an external input to start the conversion.
> >
> > 2) Some converters use the first SPI byte to start the conversion.
> > Try to send the same SPI command to ALL your ADCs, by setting CS low
> > for all converter. Then, read the conversion results one by one. In this
> > case, you'll have to put CS high for the others ADCs, and I don't know if
> > you are going to loose the values.
> >
> > Eric.
> >
> >
> >
> > ----- Original Message -----
> > From: yschen_u@...
> > To: A...
> > Sent: Monday, July 27, 2009 6:01 AM
> > Subject: [AT91SAM] need help on SPI
> >
> >
> > Greeting to everyone. I am newbie on AT91SAM. I need your suggest on
> > my project. I am using AT91SAM9260-EK board as master SPI to communicate
> > with 16 16-bits ADCs as slave SPI. For single ADC, I can communicate with
> > it as following order: set CS pin low level, generate SCLK clock signal
> > with SPI_Write(), read data from ADC with SPI_Read(), and then set CS
> > high level. This process takes about 50us. MY question is: do I have to
> > repeat above process for each ADC? It will take over 800us, that is too
> > long for my application. There will be significant delay between 1st ADC
> > and 16th ADC. Ideally, all ADCs should be samples at the same time
> > although the data can be transferred in serial order.
> >
> > I really appreciate your helps,
> >
> > ysc.
Just a comment about your post.
<>
I didn't know that it was possible to chain SPI devices.
I don't think this is possible with AD7684 (http://www.analog.com/en/analog-to-digital-converters/ad-converters/ad7684/products/product.html)
< for CS pins. Otherwise how do you plan to interface 16 ADCs to your 9260?
(Somebody shoot me if 9260 has 16 chip selects.) >>
You can easily replace CS with any GPIO pin if you do not use PDC or "automatic chained SPI read".
As you suggest, the best should be the use of an external decoder if you want to save IOs
I suggested to add an FPGA to managed the ADCs and present all the results in one SPI access (16x16 bits).
It will permit to synchronize the 16 converters and to meet up to 100kps rate.
Eric.
----- Original Message -----
From: Caglar Akyuz
To: A...
Sent: Tuesday, July 28, 2009 8:14 AM
Subject: Re: [AT91SAM] Re: need help on SPI
On Monday 27 July 2009 23:21:36 yschen_u wrote:
> Hi Eric,
>
> I am using 16 external 16-bits ADCs for AT91SAM9260-EK, the ADC is AD7684.
> The CS sholud keep low during conversion and data transfer. The AD7684 ADC
> start the conversion when CS jump from high to low. Then the data shift out
> with SCLK pulses, and CS jump to high at the end of the transfer.
>
> The 2) case may apply on my project.
>
> The AT91SAM9260-EK can set CS low to all ADCs to start the conversion. The
> AT91SAM9260-EK generate the SCLK signal by write dummy byte
> SPI_Write(AT91C_BASE_SPI1, 0, 0xFF). Should this SPI_Write() be sent to all
> ADCs? If so, whether the data from 16 ADCs will be buffered (total will be
> 32 bytes)? Because the data from ADC will be shifted out when get SCLK
> pulses.
>
> Any mechanism in AT91SAM9260-EK can buffer the data from ADC? Can PDC be a
> help?
>
> Thanks lot for your helps,
>
You do not mention your ADC connection topology completely nor your conversion
rate. I do not know about AD7648 but I guess you connect 16 ADC end-to-end and
then connect last one to SAM9260.
If this is the case then:
Your AD converters are capable of shifting data to each other. So all you need
is 16 * X bytes where X may be 2,3,4 or whatever. So all you need to do is
sync your ADCs and issue one SPI read/write command to read all data at once.
Your SPI transfer rate and ADC convertion rate will determine how many ADCs
you can connect. So you should adjust SPI transfer rate accordingly. Use of
PDC is optional but definitely useful.
If that is not the case then I wonder if your evalutation kit has a decoder
for CS pins. Otherwise how do you plan to interface 16 ADCs to your 9260?
(Somebody shoot me if 9260 has 16 chip selects.) Other than these questions,
AT91SAM SPI have a feature of automatically asserting CS according to
peripheral address. You can combine this with PDC provided that your ADCs are
synced.
Caglar
> ysc.
>
> --- In A..., "Eric Pasquier" wrote:
> > Hi,
> >
> > It seems that you would like to synchronize your 16 ADCs.
> > As you do not tell us which ADC you are using, I suggest you 2
> > possibilities :
> >
> > 1) Some converters have an external input to start the conversion.
> >
> > 2) Some converters use the first SPI byte to start the conversion.
> > Try to send the same SPI command to ALL your ADCs, by setting CS low
> > for all converter. Then, read the conversion results one by one. In this
> > case, you'll have to put CS high for the others ADCs, and I don't know if
> > you are going to loose the values.
> >
> > Eric.
> >
> >
> >
> > ----- Original Message -----
> > From: yschen_u@...
> > To: A...
> > Sent: Monday, July 27, 2009 6:01 AM
> > Subject: [AT91SAM] need help on SPI
> >
> >
> > Greeting to everyone. I am newbie on AT91SAM. I need your suggest on
> > my project. I am using AT91SAM9260-EK board as master SPI to communicate
> > with 16 16-bits ADCs as slave SPI. For single ADC, I can communicate with
> > it as following order: set CS pin low level, generate SCLK clock signal
> > with SPI_Write(), read data from ADC with SPI_Read(), and then set CS
> > high level. This process takes about 50us. MY question is: do I have to
> > repeat above process for each ADC? It will take over 800us, that is too
> > long for my application. There will be significant delay between 1st ADC
> > and 16th ADC. Ideally, all ADCs should be samples at the same time
> > although the data can be transferred in serial order.
> >
> > I really appreciate your helps,
> >
> > ysc.
Reply by ●July 28, 20092009-07-28
On Tuesday 28 July 2009 15:43:26 Eric Pasquier wrote:
> Hi Caglar,
>
Hi,
> Just a comment about your post.
>
> <>
> I didn't know that it was possible to chain SPI devices.
For instance ADS1271 from TI.
> I don't think this is possible with AD7684
> (http://www.analog.com/en/analog-to-digital-converters/ad-converters/ad7684
>/products/product.html)
>
I guess AD7684 is not designed to be used in multiple ADC cases. I'm sure AD
has better offerings for these kind of applications.
> < > decoder for CS pins. Otherwise how do you plan to interface 16 ADCs to your
> 9260? (Somebody shoot me if 9260 has 16 chip selects.) >>
> You can easily replace CS with any GPIO pin if you do not use PDC or
> "automatic chained SPI read". As you suggest, the best should be the use of
> an external decoder if you want to save IOs
>
> I suggested to add an FPGA to managed the ADCs and present all the results
> in one SPI access (16x16 bits). It will permit to synchronize the 16
> converters and to meet up to 100kps rate.
>
You are totally right.
Thanks,
Caglar
> Hi Caglar,
>
Hi,
> Just a comment about your post.
>
> <>
> I didn't know that it was possible to chain SPI devices.
For instance ADS1271 from TI.
> I don't think this is possible with AD7684
> (http://www.analog.com/en/analog-to-digital-converters/ad-converters/ad7684
>/products/product.html)
>
I guess AD7684 is not designed to be used in multiple ADC cases. I'm sure AD
has better offerings for these kind of applications.
> < > decoder for CS pins. Otherwise how do you plan to interface 16 ADCs to your
> 9260? (Somebody shoot me if 9260 has 16 chip selects.) >>
> You can easily replace CS with any GPIO pin if you do not use PDC or
> "automatic chained SPI read". As you suggest, the best should be the use of
> an external decoder if you want to save IOs
>
> I suggested to add an FPGA to managed the ADCs and present all the results
> in one SPI access (16x16 bits). It will permit to synchronize the 16
> converters and to meet up to 100kps rate.
>
You are totally right.
Thanks,
Caglar
Reply by ●July 28, 20092009-07-28
My expected rate is 2000Hz. I need to syncronize all the ADCs.
As you mentioned, 120kps will be splitted by 16 channels, it will be: 7500 byte per second. That's fast enough for my project.
Thanks lot for all the suggestions from this group.
ysc.
--- In A..., epasquier@... wrote:
>
> Hi,
>
> What is your expected rate ?
> Do you need to synchronize all the ADCs ?
>
> Theorically, you need 3 bytes at a maximum SPI clock of 2.9MHz, ie, ~120kps.
> With 1 SPI channel, 120/16u00kps.
> You need to take into account the exact SPI clock frequency and processing time.
>
> You may connect all CS together, and all DOUT together, but you will have to
> multiplex the 16 Clocks with an external circuit.
>
> If you need higher transfert rate, you will have to interface the 16 ADCs with
> an external circuit which should present 16x16bits registers to the SPI. May be
> with a little FPGA.
>
> Eric.
>
> Selon yschen_u :
>
> > Hi Eric,
> >
> > I am using 16 external 16-bits ADCs for AT91SAM9260-EK, the ADC is AD7684.
> > The CS sholud keep low during conversion and data transfer. The AD7684 ADC
> > start the conversion when CS jump from high to low. Then the data shift out
> > with SCLK pulses, and CS jump to high at the end of the transfer.
> >
> > The 2) case may apply on my project.
> >
> > The AT91SAM9260-EK can set CS low to all ADCs to start the conversion. The
> > AT91SAM9260-EK generate the SCLK signal by write dummy byte
> > SPI_Write(AT91C_BASE_SPI1, 0, 0xFF). Should this SPI_Write() be sent to all
> > ADCs? If so, whether the data from 16 ADCs will be buffered (total will be 32
> > bytes)? Because the data from ADC will be shifted out when get SCLK pulses.
> >
> > Any mechanism in AT91SAM9260-EK can buffer the data from ADC? Can PDC be a
> > help?
> >
> > Thanks lot for your helps,
> >
> > ysc.
> >
> >
> > --- In A..., "Eric Pasquier" wrote:
> > >
> > > Hi,
> > >
> > > It seems that you would like to synchronize your 16 ADCs.
> > > As you do not tell us which ADC you are using, I suggest you 2
> > possibilities :
> > >
> > > 1) Some converters have an external input to start the conversion.
> > >
> > > 2) Some converters use the first SPI byte to start the conversion.
> > > Try to send the same SPI command to ALL your ADCs, by setting CS low
> > for all converter.
> > > Then, read the conversion results one by one. In this case, you'll have
> > to put CS high for the others ADCs,
> > > and I don't know if you are going to loose the values.
> > >
> > > Eric.
> > >
> > >
> > >
> > > ----- Original Message -----
> > > From: yschen_u@
> > > To: A...
> > > Sent: Monday, July 27, 2009 6:01 AM
> > > Subject: [AT91SAM] need help on SPI
> > >
> > >
> > > Greeting to everyone. I am newbie on AT91SAM. I need your suggest on my
> > project. I am using AT91SAM9260-EK board as master SPI to communicate with 16
> > 16-bits ADCs as slave SPI. For single ADC, I can communicate with it as
> > following order: set CS pin low level, generate SCLK clock signal with
> > SPI_Write(), read data from ADC with SPI_Read(), and then set CS high level.
> > This process takes about 50us. MY question is: do I have to repeat above
> > process for each ADC? It will take over 800us, that is too long for my
> > application. There will be significant delay between 1st ADC and 16th ADC.
> > Ideally, all ADCs should be samples at the same time although the data can be
> > transferred in serial order.
> > >
> > > I really appreciate your helps,
> > >
> > > ysc.
> > >
> >
> >
>
As you mentioned, 120kps will be splitted by 16 channels, it will be: 7500 byte per second. That's fast enough for my project.
Thanks lot for all the suggestions from this group.
ysc.
--- In A..., epasquier@... wrote:
>
> Hi,
>
> What is your expected rate ?
> Do you need to synchronize all the ADCs ?
>
> Theorically, you need 3 bytes at a maximum SPI clock of 2.9MHz, ie, ~120kps.
> With 1 SPI channel, 120/16u00kps.
> You need to take into account the exact SPI clock frequency and processing time.
>
> You may connect all CS together, and all DOUT together, but you will have to
> multiplex the 16 Clocks with an external circuit.
>
> If you need higher transfert rate, you will have to interface the 16 ADCs with
> an external circuit which should present 16x16bits registers to the SPI. May be
> with a little FPGA.
>
> Eric.
>
> Selon yschen_u :
>
> > Hi Eric,
> >
> > I am using 16 external 16-bits ADCs for AT91SAM9260-EK, the ADC is AD7684.
> > The CS sholud keep low during conversion and data transfer. The AD7684 ADC
> > start the conversion when CS jump from high to low. Then the data shift out
> > with SCLK pulses, and CS jump to high at the end of the transfer.
> >
> > The 2) case may apply on my project.
> >
> > The AT91SAM9260-EK can set CS low to all ADCs to start the conversion. The
> > AT91SAM9260-EK generate the SCLK signal by write dummy byte
> > SPI_Write(AT91C_BASE_SPI1, 0, 0xFF). Should this SPI_Write() be sent to all
> > ADCs? If so, whether the data from 16 ADCs will be buffered (total will be 32
> > bytes)? Because the data from ADC will be shifted out when get SCLK pulses.
> >
> > Any mechanism in AT91SAM9260-EK can buffer the data from ADC? Can PDC be a
> > help?
> >
> > Thanks lot for your helps,
> >
> > ysc.
> >
> >
> > --- In A..., "Eric Pasquier" wrote:
> > >
> > > Hi,
> > >
> > > It seems that you would like to synchronize your 16 ADCs.
> > > As you do not tell us which ADC you are using, I suggest you 2
> > possibilities :
> > >
> > > 1) Some converters have an external input to start the conversion.
> > >
> > > 2) Some converters use the first SPI byte to start the conversion.
> > > Try to send the same SPI command to ALL your ADCs, by setting CS low
> > for all converter.
> > > Then, read the conversion results one by one. In this case, you'll have
> > to put CS high for the others ADCs,
> > > and I don't know if you are going to loose the values.
> > >
> > > Eric.
> > >
> > >
> > >
> > > ----- Original Message -----
> > > From: yschen_u@
> > > To: A...
> > > Sent: Monday, July 27, 2009 6:01 AM
> > > Subject: [AT91SAM] need help on SPI
> > >
> > >
> > > Greeting to everyone. I am newbie on AT91SAM. I need your suggest on my
> > project. I am using AT91SAM9260-EK board as master SPI to communicate with 16
> > 16-bits ADCs as slave SPI. For single ADC, I can communicate with it as
> > following order: set CS pin low level, generate SCLK clock signal with
> > SPI_Write(), read data from ADC with SPI_Read(), and then set CS high level.
> > This process takes about 50us. MY question is: do I have to repeat above
> > process for each ADC? It will take over 800us, that is too long for my
> > application. There will be significant delay between 1st ADC and 16th ADC.
> > Ideally, all ADCs should be samples at the same time although the data can be
> > transferred in serial order.
> > >
> > > I really appreciate your helps,
> > >
> > > ysc.
> > >
> >
> >
>
Reply by ●July 28, 20092009-07-28
3 observations:
- there are ADC's with hardware sample trigger, e.g. TI ADS7870
- there are ADC's with parallel interface (though as mentioned maybe FPGA makes sense here)
- reference to some CPLD IP, Xilinx app. note XAPP355 for VHDL on a controller that dumps converted data to SRAM
--- In A..., "yschen_u" wrote:
> > > application. There will be significant delay between 1st ADC and 16th ADC.
> > > Ideally, all ADCs should be samples at the same time although the data can be
> > > transferred in serial order.
- there are ADC's with hardware sample trigger, e.g. TI ADS7870
- there are ADC's with parallel interface (though as mentioned maybe FPGA makes sense here)
- reference to some CPLD IP, Xilinx app. note XAPP355 for VHDL on a controller that dumps converted data to SRAM
--- In A..., "yschen_u" wrote:
> > > application. There will be significant delay between 1st ADC and 16th ADC.
> > > Ideally, all ADCs should be samples at the same time although the data can be
> > > transferred in serial order.
