? ATmega128 + Z85c30 memory map IO connect Timing

Started by August 12, 2003
I designed it for memory mapped.

SCC + 3.6864Mhz AVR + 74HC573 + 3.6864Mhz
D0~D7 D0~D7
A/nB A1
D/nC A0
nRD nRD
nWR nWR
nCE nA15(A15 + 74HC14 one gate)

PCLK 3.6864Mhz

Can you IO timing confirmation?

plz help me.