Soft ARM in an FPGA

Started by arm_newbie December 22, 2008
Sorry if this is a repeat post. . . I'm trying to understand the
reasons why someone would put a soft ARM processor in an FPGA.  Both
Xilinx and Altera have fine 32-bit offerings that have good
development environments, growing ecosystems, and rich catalogs of
IP.  I suspect it has something to do with ARM being an industry
standard or something like that, but the reality is that the ARM will
run at like 25 MHz on a good day, while the MicroBlaze or NIOS will
run 2X - 3X without much effort.  So what gives?

FYI, I'm a hardware guy, so if the advantages are SW-based, a little
elaboration will be greatly appreciated.
On 22 Dec, 15:28, arm_newbie <myprocesso...@gmail.com> wrote:
> Sorry if this is a repeat post. . . I'm trying to understand the > reasons why someone would put a soft ARM processor in an FPGA. =A0Both > Xilinx and Altera have fine 32-bit offerings that have good > development environments, growing ecosystems, and rich catalogs of > IP. =A0I suspect it has something to do with ARM being an industry > standard or something like that, but the reality is that the ARM will > run at like 25 MHz on a good day, while the MicroBlaze or NIOS will > run 2X - 3X without much effort. =A0So what gives? > > FYI, I'm a hardware guy, so if the advantages are SW-based, a little > elaboration will be greatly appreciated.
Some people prefer the ARM architecture, and have lots of code they have already developed. Leon
Un bel giorno arm_newbie digit&#2013265922;:

> Sorry if this is a repeat post. . . I'm trying to understand the > reasons why someone would put a soft ARM processor in an FPGA. Both > Xilinx and Altera have fine 32-bit offerings that have good > development environments, growing ecosystems, and rich catalogs of > IP. I suspect it has something to do with ARM being an industry > standard or something like that, but the reality is that the ARM will > run at like 25 MHz on a good day, while the MicroBlaze or NIOS will > run 2X - 3X without much effort. So what gives?
For starters, you can easily cross compile and run Linux (even the full blown kernel) on several ARM cores. You can probably do it also with Nios or Microblaze somehow, but I bet it would be a PITA. -- emboliaschizoide.splinder.com
On Dec 22, 11:06=A0am, Leon <leon...@btinternet.com> wrote:
> On 22 Dec, 15:28, arm_newbie <myprocesso...@gmail.com> wrote: > > > Sorry if this is a repeat post. . . I'm trying to understand the > > reasons why someone would put a soft ARM processor in an FPGA. =A0Both > > Xilinx and Altera have fine 32-bit offerings that have good > > development environments, growing ecosystems, and rich catalogs of > > IP. =A0I suspect it has something to do with ARM being an industry > > standard or something like that, but the reality is that the ARM will > > run at like 25 MHz on a good day, while the MicroBlaze or NIOS will > > run 2X - 3X without much effort. =A0So what gives? > > > FYI, I'm a hardware guy, so if the advantages are SW-based, a little > > elaboration will be greatly appreciated. > > Some people prefer the ARM architecture, and have lots of code they > have already developed. > > Leon
Yes but aren't there issues with compatibility from one ARM to the other. It looks like the soft ARM is generally the Cortex-M1 or Cortex-M3. If I understand it correctly, the older ARMs (ARM7, ARM9, and ARM11) would run on the FPGA, but if I wanted to take the FPGA/ Cortex-M1 design and migrate to an ASIC with say an ARM11, that wouldn't work, would it? Put another way, are there typically compiler switches to make it easy to target different ARM flavors?
On 2008-12-22, arm_newbie <myprocessor98@gmail.com> wrote:

> Sorry if this is a repeat post. . . I'm trying to understand > the reasons why someone would put a soft ARM processor in an > FPGA. Both Xilinx and Altera have fine 32-bit offerings that > have good development environments, growing ecosystems, and > rich catalogs of IP.
I suppose so, for some definitions of "fine", "good", and "rich". Regarding the Altera/NIOS2 option, the gcc/uClinux port is incomplete (no NPTL, no XIP, no PIC). The Eclipse-based development environment is dreadful. The performance is rather poor. Running our applications, we find a 63MHz NIOS2 to be slower than a 44MHz ARM7.
> I suspect it has something to do with ARM being an industry > standard or something like that, but the reality is that the > ARM will run at like 25 MHz on a good day, while the > MicroBlaze or NIOS will run 2X - 3X without much effort. So > what gives?
I don't know about the MicroBlaze, but based on my experience with the NIOS2, you'd better plan on running it at about 2X the clock rate of an ARM.
> FYI, I'm a hardware guy, so if the advantages are SW-based, a > little elaboration will be greatly appreciated.
The tools for NIOS2 are pretty shabby compared to ARM. Neither GCC nor uClinux support is in the main source tree like ARM support is. uClinux for NIOS2 is missing some important features, and AFIACT has been abandoned by Altera. With NIOS2 you're stuck with JTAG HW and badly-done, closed-source software from Altera. With ARM, there are tons of excellent choices for both HW and SW JTAG support. And so on... I don't particularly care whether the architecture itself is an "industry standard" or not. What I care about is the variety and quality of tools that results when an architecture is "industry standard". -- Grant Edwards grante Yow! I had a lease on an at OEDIPUS COMPLEX back in visi.com '81 ...
arm_newbie wrote:
> Sorry if this is a repeat post. . . I'm trying to understand the > reasons why someone would put a soft ARM processor in an FPGA. Both > Xilinx and Altera have fine 32-bit offerings that have good > development environments, growing ecosystems, and rich catalogs of > IP. I suspect it has something to do with ARM being an industry > standard or something like that, but the reality is that the ARM will > run at like 25 MHz on a good day, while the MicroBlaze or NIOS will > run 2X - 3X without much effort. So what gives? > > FYI, I'm a hardware guy, so if the advantages are SW-based, a little > elaboration will be greatly appreciated.
An interesting alternative for Altera is the ColdFire - a ColdFire v1 core is freely available for Altera FPGAs (I think other ColdFire cores are also available, at a cost). The ColdFire is fully supported by gcc, ucLinux, etc., in the standard sources, as well as newer gcc versions from CodeSourcery, and there are tools and OS's from many of the major commercial embedded toolchain developers.
On Dec 22, 2:12=A0pm, Grant Edwards <gra...@visi.com> wrote:
> On 2008-12-22, arm_newbie <myprocesso...@gmail.com> wrote: > > > Sorry if this is a repeat post. . . I'm trying to understand > > the reasons why someone would put a soft ARM processor in an > > FPGA. =A0Both Xilinx and Altera have fine 32-bit offerings that > > have good development environments, growing ecosystems, and > > rich catalogs of IP. > > I suppose so, for some definitions of "fine", "good", and > "rich". > > Regarding the Altera/NIOS2 option, the gcc/uClinux port is > incomplete (no NPTL, no XIP, no PIC). =A0The Eclipse-based > development environment is dreadful. =A0The performance is rather > poor. =A0Running our applications, we find a 63MHz NIOS2 to be > slower than a 44MHz ARM7. > > > I suspect it has something to do with ARM being an industry > > standard or something like that, but the reality is that the > > ARM will run at like 25 MHz on a good day, while the > > MicroBlaze or NIOS will run 2X - 3X without much effort. =A0So > > what gives? > > I don't know about the MicroBlaze, but based on my experience > with the NIOS2, you'd better plan on running it at about 2X the > clock rate of an ARM. >
OK, now we're getting somewhere. Why does the NIOS (or presumably MicroBlaze) have to run at 2x the ARM? Is the compiler really bad? Are you talking about network performance? The reason I ask (and my apologies if this is a stupid question) is NIOS advertises 1.15 DMIPS / MHz. MicroBlaze is supposed to be a little more than that. ARM Cortex M3 advertises 1.25 DMIPS/MHz and the Cortex-M1 is stated at only 0.8 DMIPs/MHz so at best I would think it would be a wash. So why the 2x requirement you mention? Again, sorry if this is a stupid question.