We have following queries regarding Marvel 88E1145 chipset.
Following are few observations:
We have connected all MDIO and MDC to single port.
PHY ID read from controller is always “FFFF”, hence initialization
When we give command in U-boot (bootloader) as “mii read 2 0 – We see
MDIO and MDC being toggled in CRO.
We enabled the “DIS_125CLK” and could see in CRO, a clean 125Mhz
The Reset PIN is held “HIGH” through Software.
Below are our queries:
Please let us know, if there are any check points, before software tries
to read the PHY ID.
What could be the reason, for PHY ID being read as “FFFF”
Are there any mandatory PHY Register Settings, which should be done before
accessing the PHY?
If there is continuous Clock on MDC pin? What does this infer?
What are default states of following pins, after RESET and also during
MDIO /MDC pins.
Please let us know, if any more information is needed.
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