Started by comp.zrch.embedded April 29, 2009
I have an issue with the baud rate clock on a AT91SAM7S processor.

The processor will run from an external 18.432MHz crystal and run at
this frequency or will divide this down to 1.152MHz when it is
required to run in low power mode. We also need to use the USART and
do not want to loose any characters that are currently being received
when we we switch over clock frequency. We also which at have a
maximum baud rate of 115200. (1.152MHz/10) so 1.152MHz baud clock is
about the slowest that will work.
My original intention was to use PCK clock out which comes from the
main 18.432 crystal  and is unaffected by processor speed. This was to
have been divided down to give a baud clock of 1.152MHz. However the
speck for the external baud clock is at least 4.5 times slower the MCK
(Processor clock).  Does this 4.5 still apply to a external
synchronous clock and if so why?
If you change the USART baud divisor mid receive character because the
MCK clock has changed  will it cause a USART reset and so loose the
incoming character. Basically we want to run the core at two different
frequencies without loosing any incoming RS232 characters when we
switch speeds. The incoming receive characters cannot be stopped.
Any help or ideas would be appreciated