how to initialize the sdram refresh control register?

Hi all,

 I have a target board with vr4131 processor and K4S561632C-75c samsung
sdram, vr4131 has inbuilt sdram controller. Now i have to set the sdram
control unit's refresh control register. for that formula what they have
given in the vr4131 user manual is 

Refresh interval = BRF(13:0) × VTClock 

Calculate the setting value based on the DRAM refresh cycle count and bus
access cycle (each address space/bus hold cycle) that are used. Refer to
the CLKSPEEDREG register for the frequency of VTClock. 

Values which i have:

VTClock =33.2Mhz 
Refresh cycle count= 64ms/8k =7.81usec (from sdram data sheet) 
bus access cycle =  each address space/bus hold cycle=32 bit/241nsec

but I didn’t get the relation between  Refresh cycle count and  bus
access cycle
to calculate the refresh interval I tried division and multiplication as
well. but result is irrelevant .

i need to calculate BRF value (14 bits).
 if any one have some idea. Please help me 

Thanks in advance 

Regards, 
Lucky