FRAM FM3808 interfacing

I'm trying to design a circuit with Ramtron's non-volatile 
parallel FRAM with built-in RTC - the FM3808.

The datasheet states that the FRAM works differently than 
SRAM, in that it needs the chip enable CE/ to toggle between 
each access and not stay low.  This is because it is needed 
for the necessary precharge period.

I'm using an Atmel ATmega128's external memory bus, and will 
be having other devices on the bus as well.  I've seen a 
schematic with the ALE connected to the CE/ and the address 
/ data bus connected together since the FRAM has an internal 
latch - but this would leave the FRAM on the bus all the 
time, and I have other devices mapped.

Is there a simple way to put this chip on a memory bus 
without conflicting with other devices, and generating the 
necessary toggling of the CS/ line?

Does anyone have any experience with this chip, or it's 
smaller brother the FM1808?  Any sample schematics to steer 
me right?

And is the FRAM too slow to be used with no-wait states on 
an ATmega128 running at 16mhz?


Thanks

Glenn wrote:
> I'm trying to design a circuit with Ramtron's non-volatile parallel FRAM 
> with built-in RTC - the FM3808.
> 
> The datasheet states that the FRAM works differently than SRAM, in that 
> it needs the chip enable CE/ to toggle between each access and not stay 
> low.  This is because it is needed for the necessary precharge period.
> 
> I'm using an Atmel ATmega128's external memory bus, and will be having 
> other devices on the bus as well.  I've seen a schematic with the ALE 
> connected to the CE/ and the address / data bus connected together since 
> the FRAM has an internal latch - but this would leave the FRAM on the 
> bus all the time, and I have other devices mapped.
> 
> Is there a simple way to put this chip on a memory bus without 
> conflicting with other devices, and generating the necessary toggling of 
> the CS/ line?
> 

A logic device such as a 22v10 would work here.
( left as an exercise for the user :-) )

> Does anyone have any experience with this chip, or it's smaller brother 
> the FM1808?  Any sample schematics to steer me right?
> 
> And is the FRAM too slow to be used with no-wait states on an ATmega128 
> running at 16mhz?
> 
The FRAM data sheet says on page 20 the read/write cycle time is 130 
nSec. 70 nSec access + 60 nSec Precharge time.

As you said above, for every access.

16Mhz is 62.5 nSec. You would need at least 2 wait states maybe 3.

> 
> Thanks
> 
Your Welcome.