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Request for help in neew development with AO, DIO, counters and real time

Started by alopez April 27, 2010
Hello,

We have a product developed on an Intel Atom SBC and a NI DAQ that provides
2 AO, 8 DIO and 2 counters, for laser control on real time. The system runs
with a RTAI partched linux and Comedi drivers to achieve real time
performance on microseconds period (25 usec). A compact flash stores all
the software and data.

We would like to migrate to a CPU + FPGA environment on the same card, for
space and cost reduction, and future developments. I have a lot of
questions related to this migration, I would really appreciate any help on
this:

- Is it possible to get AO on the FPGA? It could be with Pulse Width
Modulation, if there is not possible to get a real AO

- Could you recommend a card with a CPU and FPGA, all together, to start
learning about this?

- Any other hints to start on FPGA and linux on the same card?

Thanks in advance
Antonio López

	   
					
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Posted through http://www.EmbeddedRelated.com
On Apr 27, 6:06=A0am, "alopez" <alopez@n_o_s_p_a_m.fotonicalaser.com>
wrote:
> Hello, > > We have a product developed on an Intel Atom SBC and a NI DAQ that provid=
es
> 2 AO, 8 DIO and 2 counters, for laser control on real time. The system ru=
ns
> with a RTAI partched linux and Comedi drivers to achieve real time > performance on microseconds period (25 usec). A compact flash stores all > the software and data. > > We would like to migrate to a CPU + FPGA environment on the same card, fo=
r
> space and cost reduction, and future developments. I have a lot of > questions related to this migration, I would really appreciate any help o=
n
> this: > > - Is it possible to get AO on the FPGA? It could be with Pulse Width > Modulation, if there is not possible to get a real AO
You can use resistor network to drive an op-amp adder/integrator.
> > - Could you recommend a card with a CPU and FPGA, all together, to start > learning about this? > > - Any other hints to start on FPGA and linux on the same card?
Use soft CPU IP on the FPGA.
> > Thanks in advance > Antonio L=F3pez > > --------------------------------------- =A0 =A0 =A0 =A0 > Posted throughhttp://www.EmbeddedRelated.com