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JTAG and ICE difference

Started by Roman Mashak June 1, 2004
Hello, All!

    I believe - there are a lot of professionals here.
    Could you please explain the differences between this debugging
technologies? Or, please, provide me with documentation related to this
topic. Thanks in advance!

With best regards, Roman Mashak.  E-mail: mrv@tusur.ru


"Roman Mashak" <mrv@tusur.ru> wrote in message news:<c9hap5$1r9v$1@mpeks.tomsk.su>...

> Could you please explain the differences between this debugging > technologies? Or, please, provide me with documentation related to this > topic. Thanks in advance!
JTAG (joint test actions group) is an IEEE standard which defines a state machine which you can use for boundary scan and such like. IEEE1149.1-1990 if you can stomach it. ICE (in circuit emulator) is exactly what the abbreviation says. Often an on chip ICE can be controlled through JTAG, but not always, just as the presence of JTAG does not imply a device must have ICE capabilities, just as an ICE can run without JTAG. For documentation on ICE, you need to consult the vendor of the chip, Sprow.
Hello, Sprow!
You wrote  on 1 Jun 2004 11:35:46 -0700:

 S> JTAG (joint test actions group) is an IEEE standard which defines a
 S> state machine which you can use for boundary scan and such like.
 S> IEEE1149.1-1990 if you can stomach it.
    I've read that JTAG is also used for downloading the image onto flash.
Is that true?
 S> ICE (in circuit emulator) is exactly what the abbreviation says.
    So, as 'emulator' implies - ICE is making emulation of CPU (or/and
another hardware) on the board?
 S> Often an on chip ICE can be controlled through JTAG, but not always,
 S> just as the presence of JTAG does not imply a device must have ICE
 S> capabilities, just as an ICE can run without JTAG.

With best regards, Roman Mashak.  E-mail: mrv@tusur.ru


On Tue, 1 Jun 2004 16:21:05 +0900, "Roman Mashak" <mrv@tusur.ru> wrote
in comp.arch.embedded:

> Hello, All! > > I believe - there are a lot of professionals here. > Could you please explain the differences between this debugging > technologies? Or, please, provide me with documentation related to this > topic. Thanks in advance! > > With best regards, Roman Mashak. E-mail: mrv@tusur.ru >
The traditional ICE (In Circuit Emulator) is a device that replaces the processor or controller on the board. Inside it usually contains a processor or controller of the same family. In some cases, this is a special "bond out" version from the chip vendor, that brings out extra hardware signals from inside the chip that are not connected to pins in the regular version. In addition to the processor it replaces, it generally contains other circuitry such as RAM to emulate RAM and EPROM/ROM, and extra control circuits to allow starting and stopping, single-stepping, and so on. It might also have extra trace memory to capture bus cycles and so on. These can offer a lot of features, but that extra circuitry affects timing. As processors got faster, it became almost impossible to get the emulator to operate at full processor speed in real time. Most newer design processors have some sort of debugging unit built into the chip itself, that is accessed through the JTAG controller. They have a more limited version of the features of the stand-alone ICE, but they have the advantage of allowing the processor to operate in circuit at full speed or very close to it. They are also much less expensive. The highest speed true ICE that I ever worked with was for a 66 MHz 486 DX2. Ten years ago it cost more than ten JTAG debuggers for something like a 200 MHz ARM9 today. -- Jack Klein Home: http://JK-Technology.Com FAQs for comp.lang.c http://www.eskimo.com/~scs/C-faq/top.html comp.lang.c++ http://www.parashift.com/c++-faq-lite/ alt.comp.lang.learn.c-c++ http://www.contrib.andrew.cmu.edu/~ajo/docs/FAQ-acllc.html
Hello, Jack!
You wrote  on Tue, 01 Jun 2004 22:21:21 -0500:

 JK> The traditional ICE (In Circuit Emulator) is a device that replaces
 JK> the processor or controller on the board.  Inside it usually contains
 JK> a processor or controller of the same family.  In some cases, this is
 JK> a special "bond out" on from the chip vendor, that brings out
 JK> extra hardware signals from inside the chip that are not connected to
 JK> pins in the regular version.
    So - mostly ICE is used when you don't have 'real' processor on your
development board, right ?
    But I don't quite understand JTAG function.... If I can debug and test
hardware/software using ICE, then why JTAG?
 JK> In addition to the processor it replaces, it generally contains other
 JK> circuitry such as RAM to emulate RAM and EPROM/ROM, and extra control
 JK> circuits to allow starting and stopping, single-stepping, and so on.
 JK> It might also have extra trace memory to capture bus cycles and so on.

    I was searching in Internet - and I found usually ICE consists of
seperate device, realizing all logic and functions, and pod installing on
socket in board. Then it's connected with cable....
    Did I understand correctly?

With best regards, Roman Mashak.  E-mail: mrv@tusur.ru


In article <c9hap5$1r9v$1@mpeks.tomsk.su>, Roman Mashak <mrv@tusur.ru>
writes
>Hello, All! > > I believe - there are a lot of professionals here. > Could you please explain the differences between this debugging >technologies? Or, please, provide me with documentation related to this >topic. Thanks in advance! > >With best regards, Roman Mashak. E-mail: mrv@tusur.ru
Look at the deguggers paper on Http://Quest.phaedsuys.org I also have a short paper discussing JTAG and ICE that I can send you. (this is about to be rolled into the debuggers paper but is in separate at the moment.) /\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\ \/\/\/\/\ Chris Hills Staffs England /\/\/\/\/\ /\/\/ chris@phaedsys.org www.phaedsys.org \/\/ \/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/
Hello, Chris!
You wrote  on Wed, 2 Jun 2004 07:31:40 +0100:

 ??>>    I believe - there are a lot of professionals here.
 ??>>    Could you please explain the differences between this debugging
 ??>> technologies? Or, please, provide me with documentation related to
 ??>> this topic. Thanks in advance! With best regards, Roman Mashak.
 ??>> E-mail: mrv@tusur.ru

 CH> Look at the deguggers paper on Http://Quest.phaedsuys.org
 CH> I also have a short paper discussing JTAG and ICE that I can send you.
 CH> (this is about to be rolled into the debuggers paper but is in separate
at the moment.)
    I would appreciate if you send me to e-mail  !

With best regards, Roman Mashak.  E-mail: mrv@tusur.ru