On Fri, 8 Feb 2013 12:52:55 +0000 (UTC) Simon Clubley <clubley@remove_me.eisner.decus.org-Earth.UFP> wrote:> I will be using a level shifter to down shift the other SPI lines from > the 5V MCU to the 3.3V SPI devices. As the level shifter is not > bi-directional, I cannot use a spare channel on the same device to level > shift MISO in the other direction. >Actually, Mark makes an excellent point. Real "level shifter" chips tend to be large and pricey. All you really need is a quad-channel 3.3V logic buffer with 5V tolerant inputs. A NC7WZ125 is a dual tri-state buffer in a US8. You could use 1 1/2 of them to level-shift the outbound lines, and the remaining 1/2 to protect the MISO of your delicate SPI device from being accidentally driven by the CPU. If you're sharing the SPI bus, you could drive the OE of MISO buffer from the SSEL to that chip. Whole thing will cost you less than $0.40. If you're not sharing the SPI bus and don't need the tri-state, you could even go to just a dumb dual buffer like a NC7WZ17; gets you a 6-pin SOT23 instead and brings the cost down a few cents more. -- Rob Gaddi, Highland Technology -- www.highlandtechnology.com Email address domain is currently out of order. See above to fix.
Interfacing 3.3V SPI devices to a 5V MCU
Started by ●February 7, 2013
Reply by ●February 8, 20132013-02-08
Reply by ●February 8, 20132013-02-08
On Fri, 08 Feb 2013 12:52:55 +0000, Simon Clubley wrote:> On 2013-02-07, Mark Borgerson <mborgerson@comcast.net> wrote: >> >> Why are you worried about bi-directional shifters? IIRC, MISO always >> goes in just one direction. Depending on your SPI speed requirements, >> you might be able to protect the MISO input in one of two ways: >> >> > I will be using a level shifter to down shift the other SPI lines from > the 5V MCU to the 3.3V SPI devices. As the level shifter is not > bi-directional, I cannot use a spare channel on the same device to level > shift MISO in the other direction. > > MISO does always go in one direction; from the SPI slave to the SPI > master. My goal here is to protect against my dropping 5V onto the line > in the other direction (ie: _from_ the MCU) because I configured the MCU > for output by mistake. I also wanted to do it without having to use > another 16 pin level shifter.Put something like a SN74AHCT1G08 between the uC and the SPI. It will run at 5V and level shift the SPI to the uC. The SPI device will normally tri-state the MISO line if it's not active so you could put a pull-up to 3V3 on the input side and that would assure a +5 output back to the uC. So if the uC did drive the pin you should be OK. You could also put a resistor between the uC and the buffer output to limit any current that might be driven back into the '1G08 output pin You can get these little logic guys in SOT-23, sc-70 and SOT-553> >> 1. a serial resistor to limit currents to/from MISO. This will affect >> rise time on the signal dependent on the input capacitance of the >> buffer. >> >> 2. Use another pin to enable the output of the buffer driving MISO. >> A transient output on MPU MISO that is not accompanied by an >> appropriate level on the enable line will cause no harm. >> >> > Thanks. > > In the circuits I have seen, the 3.3V slave MISO is directly connected > into the 5v master. Given enough tolerance on what is seen as logic 1 on > the MCU input, that works just fine if the code works perfectly. > > However, it just felt "unsafe" if the code was wrong, hence my posting. > > Simon.-- Chisolm Republic of Texas
Reply by ●February 8, 20132013-02-08
On 2013-02-08, Rob Gaddi <rgaddi@technologyhighland.invalid> wrote:> On Fri, 8 Feb 2013 12:52:55 +0000 (UTC) > Simon Clubley <clubley@remove_me.eisner.decus.org-Earth.UFP> wrote: > >> I will be using a level shifter to down shift the other SPI lines from >> the 5V MCU to the 3.3V SPI devices. As the level shifter is not >> bi-directional, I cannot use a spare channel on the same device to level >> shift MISO in the other direction. >> > > Actually, Mark makes an excellent point. Real "level shifter" chips > tend to be large and pricey. All you really need is a quad-channel > 3.3V logic buffer with 5V tolerant inputs. >Thanks Rob and Joe for your additional comments. As a hobbyist, I still prefer to work in PDIP where possible, but I have looked at the devices you mention. However, I think the proper solution is to move down into the 3.3V area so that the level shifters are not required. I've been thinking about doing that for a while and this week's research has only more strongly pushed my thinking in that direction. That does leave the opposite problem of interfacing to legacy 5V devices, but with the MCUs I've looked at having 5V tolerant inputs, that will hopefully be a far easier problem to solve. I think I am going to finish off my current 5V projects then go to 3.3V. Thanks to everyone for their suggestions over the last couple of days. Simon. -- Simon Clubley, clubley@remove_me.eisner.decus.org-Earth.UFP Microsoft: Bringing you 1980s technology to a 21st century world