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Issues on clockless uart

Started by Shashi April 21, 2004
Shashi <shashi22k@rediffmail.com> wrote:

> I'm doing a project in clockless uart..as u know that the primary > function of uart is parallel to serial conversion while transmitting > and serial to paralel conversion while receiving..I was wondering if > someone could tell me as how can i do a parallel to serial conversion > and vice versa without using a clock.
I sense a serious case of "target conflict" here. As in: trying to make omeletts without harming roughly elliptical hulls of reproductive products of certain species of birds (vulgo: eggs). Serial protocol means that bits travel on the same line, separated by nothing but time. So you *will* need some gadget in your circuit that measures or controls time. Such a gadget is called a clock. Ergo: you *will* need a clock to generate any serial protocol. That leaves only one reasonable way to sneak out of your conflicting goals: you could have the clock elsewhere, i.e. in the communication node at the other end of that serial line (and pray that your clockless circuit is fast enough to keep up with the forced external clock).
> Note: This is a circuit whoch doesnt use a clock at all/ Asynchronous > Circuit/Clockless Circuit.
Then you'll have to put one in to drive the UART. -- Hans-Bernhard Broeker (broeker@physik.rwth-aachen.de) Even if all the snow were burnt, ashes would remain.
Shashi wrote:
> > Hi, > I'm doing a project in clockless uart..as u know that the primary > function of uart is parallel to serial conversion while transmitting > and serial to paralel conversion while receiving..I was wondering if > someone could tell me as how can i do a parallel to serial conversion > and vice versa without using a clock. > > Note: This is a circuit whoch doesnt use a clock at all/ Asynchronous > Circuit/Clockless Circuit.
I belive this was also posted to comp.arch.fpga. A UART sends data bit serial with a given period per bit. So the signal must sampled on a timed basis in order to read the bits after synchronizing with the start bit. Normally a clock is used to provide the timing, but there are other ways. A tapped delay line can be used to delay the input signal. The start bit can be detected at the end of the delay line and the data bits are read at each of the bit taps. Once a start bit is detected, the start bit detection must be disabled for one full character time. This would be a very difficult circuit to design. But it could be done. -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAX
On Thu, 22 Apr 2004 12:20:55 -0400, Ben Bradley
<ben_nospam_bradley@mindspring.example.com> wrote:


>>You could do it with a string of one-shots, but >>I feel guilty just suggesting such a grotesque >>kludge. > > I thought of that too, it seems like an interesting if a bit >bizarre design exercise, but I didn't mention it because the post >smells too much like a homework/class assignment.
I guess giving "impossible" homework and watching what kind of stories the students put on the internet and what discussion this will cause might be fun to watch :-). While a string of multivibrators or delay lines are simply to generate a serial stream of serial stream of bits with some badly defined rate (+/- 20 %) and gating the start bit through a similar chain of multivibrators (with as bad tolerances) on receive might give not so impressive results. Since it was not stated if this had to be done in silicon, I would suggest looking at how the original Teletypes did it with rotating shafts and electromagnets. These devices were fully electro mechanical and in some more modern versions the only transistor was in the 20 mA constant current source, but the serdes part was fully electro-mechanical. Of course, some may claim that the constant rotating speed of the shaft was a clock, but on the other hand, as someone suggested using a delay line to loop back the pulse, this also sounds like a delay line oscillator and hence a clock. Paul