Forums

How to access a RAVEN or Chameleon POD (in Raven mode) ?

Started by Claudio April 20, 2004
Hi all,

We have already developed a flash programmer using a
wiggler compatible JTAG interface, directly manipulating
the JTAG pins (TCK, TDI, TDO, TMS) through the parallel
port.

We would like to speed up the process using a Raven 
compatible interface (actually we have a Chameleon POD).
We haven't found any documentation about the interface
of this device with a parallel port.

Perhaps Mr. Laurent Gauch from AMONTEC could send some
information about it. I bet it will also interest other
people in this group.

Regards,
Claudio L. S.
Claudio wrote:
> Hi all, > > We have already developed a flash programmer using a > wiggler compatible JTAG interface, directly manipulating > the JTAG pins (TCK, TDI, TDO, TMS) through the parallel > port. > > We would like to speed up the process using a Raven > compatible interface (actually we have a Chameleon POD). > We haven't found any documentation about the interface > of this device with a parallel port. > > Perhaps Mr. Laurent Gauch from AMONTEC could send some > information about it. I bet it will also interest other > people in this group. > > Regards, > Claudio L. S.
Hi Claudio, Sorry, but we cannot give you any info on how the Raven interface is. Why, because we have to protect our design and our know-how. The Raven interface is a complexe state-machine (parallel-to-serial) with baudrate control, with auto-detection mechanism, with test mode, with some JTAG and EPP tips. Amontec is working on an new Chameleon POD version: xUSB POD version. We want to reuse the Raven know-how and to add USB messaging support (USB based on 8051). The goal is to provide an new JTAG solution close to the Abatron BDI, but cheaper and fully based on logic programmable (very generic). We are thinking to provide an open-source interface version of our xUSB POD version. But anyway, we cannot give you any info on the Raven interface. Sorry. I hope you will understand. Best Regards, Laurent Gauch
Claudio wrote:

> Hi all, > > We have already developed a flash programmer using a > wiggler compatible JTAG interface, directly manipulating > the JTAG pins (TCK, TDI, TDO, TMS) through the parallel > port. > > We would like to speed up the process using a Raven > compatible interface (actually we have a Chameleon POD). > We haven't found any documentation about the interface > of this device with a parallel port. > > Perhaps Mr. Laurent Gauch from AMONTEC could send some > information about it. I bet it will also interest other > people in this group. > > Regards, > Claudio L. S.
... Are you interested by the Raven interface, or by speed-up your JTAG interface ? I can do a version a little bit more faster than the original RAVEN. But this new config will be *not* compatible with the original Raven Dongle. I will provide the interface specification for FREE. So you will be abble to speed-up your JTAG interface using our low cost Chameleon POD. So let me know if you (and other poeple on this group) are interested by a new 'go-faster' JTAG configuration. The deal : Amontec provides the hardware, and you provide the software ! Laurent Gauch www.amontec.com
On Tue, 20 Apr 2004 15:22:19 -0700, Claudio wrote:

> Hi all, > > We have already developed a flash programmer using a wiggler compatible > JTAG interface, directly manipulating the JTAG pins (TCK, TDI, TDO, TMS) > through the parallel port. > > We would like to speed up the process using a Raven compatible interface > (actually we have a Chameleon POD). We haven't found any documentation > about the interface of this device with a parallel port. > > Perhaps Mr. Laurent Gauch from AMONTEC could send some information about > it. I bet it will also interest other people in this group. > > Regards, > Claudio L. S.
If you are interested, We can supply a USB - JTAG DONGLE for free. This is an open design with GPLed hardware and software. It supports JTAG clocks up to 48 MHz, 5V, 3.3V and 2.5V JTAG VIO. It uses a small FPGA for all logic other than USB interface, so is very flexible. The architecture supports efficient access to small sections of the JTAG scan chain (4096 bits max currently) so should be quite fast for generic flash programming tasks. The fpga config is downloaded via USB when the dongle starts up. There is a SVF player and a BIT player provided for configuration of Xilinx CPLDs and FPGAs. Any hardware or software help for more devices/platforms is welcome! Peter Wallace
"Peter C. Wallace" <pcw@freeby.mesanet.com> wrote in message news:<pan.2004.04.21.00.11.40.766966.1417@freeby.mesanet.com>...
> On Tue, 20 Apr 2004 15:22:19 -0700, Claudio wrote: > > > Hi all, > > > > We have already developed a flash programmer using a wiggler compatible > > JTAG interface, directly manipulating the JTAG pins (TCK, TDI, TDO, TMS) > > through the parallel port. > > > > We would like to speed up the process using a Raven compatible interface > > (actually we have a Chameleon POD). We haven't found any documentation > > about the interface of this device with a parallel port. > > > > Perhaps Mr. Laurent Gauch from AMONTEC could send some information about > > it. I bet it will also interest other people in this group. > > > > Regards, > > Claudio L. S. > > If you are interested, We can supply a USB - JTAG DONGLE for free. This > is an open design with GPLed hardware and software. It supports JTAG > clocks up to 48 MHz, 5V, 3.3V and 2.5V JTAG VIO. It uses a small FPGA > for all logic other than USB interface, so is very flexible. The > architecture supports efficient access to small sections of the JTAG scan > chain (4096 bits max currently) so should be quite fast for generic > flash programming tasks. The fpga config is downloaded via USB when the > dongle starts up. There is a SVF player and a BIT player provided for > configuration of Xilinx CPLDs and FPGAs. Any hardware or software help > for more devices/platforms is welcome! > > Peter Wallace
Yes, we are interested ! Is this product being sold anywhere ? We suspect that both the Raven and the Chameleon POD based their design on the TI SN74LVT8980A JTAG TAP MASTER WITH 8 BIT GENERIC HOST INTERFACE chip. It would not be too dificult to interface this chip (plus a clock generator) with an EPP or ECP compatible parallel port. We even found a VHDL model for this chip. But in the long run a USB interface is more flexible. Macraigor already launched a USB pod and as Mr. Laurent Gauch told us Amontec will also launch one. Best regards, Claudio L. S.
On Tue, 20 Apr 2004 17:11:47 -0700, "Peter C. Wallace"
<pcw@freeby.mesanet.com> wrote:

>On Tue, 20 Apr 2004 15:22:19 -0700, Claudio wrote: > >> Hi all, >> >> We have already developed a flash programmer using a wiggler compatible >> JTAG interface, directly manipulating the JTAG pins (TCK, TDI, TDO, TMS) >> through the parallel port. >> >> We would like to speed up the process using a Raven compatible interface >> (actually we have a Chameleon POD). We haven't found any documentation >> about the interface of this device with a parallel port. >> >> Perhaps Mr. Laurent Gauch from AMONTEC could send some information about >> it. I bet it will also interest other people in this group. >> >> Regards, >> Claudio L. S. > >If you are interested, We can supply a USB - JTAG DONGLE for free. This >is an open design with GPLed hardware and software. It supports JTAG >clocks up to 48 MHz, 5V, 3.3V and 2.5V JTAG VIO. It uses a small FPGA >for all logic other than USB interface, so is very flexible. The >architecture supports efficient access to small sections of the JTAG scan >chain (4096 bits max currently) so should be quite fast for generic >flash programming tasks. The fpga config is downloaded via USB when the >dongle starts up. There is a SVF player and a BIT player provided for >configuration of Xilinx CPLDs and FPGAs. Any hardware or software help >for more devices/platforms is welcome! > >Peter Wallace
Do you have an URL for this project ? Anton Erasmus
On Wed, 21 Apr 2004 10:38:51 -0700, Anton Erasmus wrote:

> On Tue, 20 Apr 2004 17:11:47 -0700, "Peter C. Wallace" > <pcw@freeby.mesanet.com> wrote: > >>On Tue, 20 Apr 2004 15:22:19 -0700, Claudio wrote: >> >>> Hi all, >>> >>> We have already developed a flash programmer using a wiggler >>> compatible JTAG interface, directly manipulating the JTAG pins (TCK, >>> TDI, TDO, TMS) through the parallel port. >>> >>> We would like to speed up the process using a Raven compatible >>> interface (actually we have a Chameleon POD). We haven't found any >>> documentation about the interface of this device with a parallel port. >>> >>> Perhaps Mr. Laurent Gauch from AMONTEC could send some information >>> about it. I bet it will also interest other people in this group. >>> >>> Regards, >>> Claudio L. S. >> >>If you are interested, We can supply a USB - JTAG DONGLE for free. This >>is an open design with GPLed hardware and software. It supports JTAG >>clocks up to 48 MHz, 5V, 3.3V and 2.5V JTAG VIO. It uses a small FPGA >>for all logic other than USB interface, so is very flexible. The >>architecture supports efficient access to small sections of the JTAG >>scan chain (4096 bits max currently) so should be quite fast for generic >>flash programming tasks. The fpga config is downloaded via USB when the >>dongle starts up. There is a SVF player and a BIT player provided for >>configuration of Xilinx CPLDs and FPGAs. Any hardware or software help >>for more devices/platforms is welcome! >> >>Peter Wallace > > Do you have an URL for this project ? > > Anton Erasmus
http://www.mesanet.com/parallelcardinfo.html (at the bottom of the page)
"Peter C. Wallace" wrote:
> > On Wed, 21 Apr 2004 10:38:51 -0700, Anton Erasmus wrote: > > > On Tue, 20 Apr 2004 17:11:47 -0700, "Peter C. Wallace" > > <pcw@freeby.mesanet.com> wrote: > > > >>On Tue, 20 Apr 2004 15:22:19 -0700, Claudio wrote: > >> > >>> Hi all, > >>> > >>> We have already developed a flash programmer using a wiggler > >>> compatible JTAG interface, directly manipulating the JTAG pins (TCK, > >>> TDI, TDO, TMS) through the parallel port. > >>> > >>> We would like to speed up the process using a Raven compatible > >>> interface (actually we have a Chameleon POD). We haven't found any > >>> documentation about the interface of this device with a parallel port. > >>> > >>> Perhaps Mr. Laurent Gauch from AMONTEC could send some information > >>> about it. I bet it will also interest other people in this group. > >>> > >>> Regards, > >>> Claudio L. S. > >> > >>If you are interested, We can supply a USB - JTAG DONGLE for free. This > >>is an open design with GPLed hardware and software. It supports JTAG > >>clocks up to 48 MHz, 5V, 3.3V and 2.5V JTAG VIO. It uses a small FPGA > >>for all logic other than USB interface, so is very flexible. The > >>architecture supports efficient access to small sections of the JTAG > >>scan chain (4096 bits max currently) so should be quite fast for generic > >>flash programming tasks. The fpga config is downloaded via USB when the > >>dongle starts up. There is a SVF player and a BIT player provided for > >>configuration of Xilinx CPLDs and FPGAs. Any hardware or software help > >>for more devices/platforms is welcome! > >> > >>Peter Wallace > > > > Do you have an URL for this project ? > > > > Anton Erasmus > > http://www.mesanet.com/parallelcardinfo.html > > (at the bottom of the page)
I guess I don't understand exactly what you are doing. Are you designing a USB JTAG unit so that you will release the design as open-source? The page you refer to has no data sheet or manual, only a link for the software and schematic. Are you selling these modules? Is the design finished yet? -- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAX
On Sat, 24 Apr 2004 03:15:51 -0700, rickman wrote:
________________________________________________________________________________

>> > >> > Do you have an URL for this project ? >> > >> > Anton Erasmus >> >> http://www.mesanet.com/parallelcardinfo.html >> >> (at the bottom of the page) > > I guess I don't understand exactly what you are doing. Are you > designing a USB JTAG unit so that you will release the design as > open-source? The page you refer to has no data sheet or manual, only a > link for the software and schematic. Are you selling these modules? Is > the design finished yet?
Yes, the design is done, the schematics and source code are available on our web site. We can supply the hardware ($99.00) assembled or bare cards for $2.00. The software (windows only at the moment) is usable but could be improved, ported and extended...