Looks like ARM has not moved to double-precision yet with M7. ST announced M7 parts that look really impressive except for this issue, and claims to have preview parts available. Wonder why still single precision?? Hmmm...
Arm Cortex-M7 - still single precision FPU
Started by ●September 24, 2014
Reply by ●September 24, 20142014-09-24
Un bel giorno Dave Nadler digit�:> Looks like ARM has not moved to double-precision yet with M7. > ST announced M7 parts that look really impressive except for this issue, > and claims to have preview parts available. > Wonder why still single precision?? > Hmmm...Actually Wikipedia claims that the M7 will have both SP and DP floating point: http://en.wikipedia.org/wiki/ARM_Cortex-M#Instruction_sets -- Fletto i muscoli e sono nel vuoto.
Reply by ●September 24, 20142014-09-24
On Wed, 24 Sep 2014 14:19:50 -0700, Dave Nadler wrote:> Looks like ARM has not moved to double-precision yet with M7. > ST announced M7 parts that look really impressive except for this issue, > and claims to have preview parts available. > Wonder why still single precision?? > Hmmm...I suspect that the size of the FPU goes up as bits^2 or bits^3 or something obnoxious like that. -- Tim Wescott Wescott Design Services http://www.wescottdesign.com
Reply by ●September 24, 20142014-09-24
Den torsdag den 25. september 2014 00.32.46 UTC+2 skrev Tim Wescott:> On Wed, 24 Sep 2014 14:19:50 -0700, Dave Nadler wrote: > > > > > Looks like ARM has not moved to double-precision yet with M7. > > > ST announced M7 parts that look really impressive except for this issue, > > > and claims to have preview parts available. > > > Wonder why still single precision?? > > > Hmmm... > > > > I suspect that the size of the FPU goes up as bits^2 or bits^3 or > > something obnoxious like that. >yeh something like that, four x*x mults to do a 2x*2x mult and a barrelshifter with twice the bits and twice the reach -Lasse
Reply by ●September 24, 20142014-09-24
On 9/24/2014 6:48 PM, langwadt@fonz.dk wrote:> Den torsdag den 25. september 2014 00.32.46 UTC+2 skrev Tim Wescott: >> On Wed, 24 Sep 2014 14:19:50 -0700, Dave Nadler wrote: >> >> >> >>> Looks like ARM has not moved to double-precision yet with M7. >> >>> ST announced M7 parts that look really impressive except for this issue, >> >>> and claims to have preview parts available. >> >>> Wonder why still single precision?? >> >>> Hmmm... >> >> >> >> I suspect that the size of the FPU goes up as bits^2 or bits^3 or >> >> something obnoxious like that. >> > > yeh something like that, four x*x mults to do a 2x*2x mult and a barrelshifter with twice the bits and twice the reachDepends on how it is implemented. They can do the work by adding more hardware or they can do the work by taking more time. It is not uncommon to do double precision floating point by using multiple clock cycles in single precision hardware. -- Rick
Reply by ●September 24, 20142014-09-24
On Wednesday, September 24, 2014 5:43:51 PM UTC-4, dalai lamah wrote:> Actually Wikipedia claims that the M7 will have both SP and DP floating > point: > http://en.wikipedia.org/wiki/ARM_Cortex-M#Instruction_setsST data-sheet says single-point...
Reply by ●September 24, 20142014-09-24
On Wednesday, September 24, 2014 7:31:31 PM UTC-4, Dave Nadler wrote:> On Wednesday, September 24, 2014 5:43:51 PM UTC-4, dalai lamah wrote: > > > Actually Wikipedia claims that the M7 will have both SP and DP floating > > > point: > > > http://en.wikipedia.org/wiki/ARM_Cortex-M#Instruction_sets > > > > ST data-sheet says single-point...Page 12 here: http://www.st.com/st-web-ui/static/active/en/resource/technical/document/data_brief/DM00116941.pdf
Reply by ●September 24, 20142014-09-24
On Wednesday, September 24, 2014 7:36:33 PM UTC-4, Dave Nadler wrote:> On Wednesday, September 24, 2014 7:31:31 PM UTC-4, Dave Nadler wrote: > > > On Wednesday, September 24, 2014 5:43:51 PM UTC-4, dalai lamah wrote: > > > Actually Wikipedia claims that the M7 will have both SP and DP floating > > > point: > > > http://en.wikipedia.org/wiki/ARM_Cortex-M#Instruction_sets > > ST data-sheet says single-point... > Page 12 here: > http://www.st.com/st-web-ui/static/active/en/resource/technical/document/data_brief/DM00116941.pdfHowever, ARM says it has double precision here: http://arm.com/products/processors/cortex-m/cortex-m7-processor.php
Reply by ●September 24, 20142014-09-24
On 9/24/2014 9:00 PM, Dave Nadler wrote:> On Wednesday, September 24, 2014 7:36:33 PM UTC-4, Dave Nadler wrote: >> On Wednesday, September 24, 2014 7:31:31 PM UTC-4, Dave Nadler wrote: >> >>> On Wednesday, September 24, 2014 5:43:51 PM UTC-4, dalai lamah wrote: >>>> Actually Wikipedia claims that the M7 will have both SP and DP floating >>>> point: >>>> http://en.wikipedia.org/wiki/ARM_Cortex-M#Instruction_sets >> >> ST data-sheet says single-point... >> Page 12 here: >> http://www.st.com/st-web-ui/static/active/en/resource/technical/document/data_brief/DM00116941.pdf > > However, ARM says it has double precision here: > http://arm.com/products/processors/cortex-m/cortex-m7-processor.phpThe ARM info is marketing... notice all that they *don't* say. I believe even on the M7 floating point is optional. I'd believe the data sheet. Anyone looked at the R series? I searched about a bit and didn't find anything with an FPU. TI and Spansion are the only ones I found making them. -- Rick
Reply by ●September 24, 20142014-09-24
Tim Wescott <seemywebsite@myfooter.really> wrote:> On Wed, 24 Sep 2014 14:19:50 -0700, Dave Nadler wrote:>> Looks like ARM has not moved to double-precision yet with M7. >> ST announced M7 parts that look really impressive except for >> this issue, and claims to have preview parts available. >> Wonder why still single precision?? >> Hmmm...> I suspect that the size of the FPU goes up as bits^2 or bits^3 or > something obnoxious like that.A full Wallace tree (combinatorial) multiplier is bits^2, but that is rare. A fully pipelined mulitplier is also bits^2, but can produce a new product every clock cycle, ones the pipeline is full. (Nice for vector processors.) Less than fully pipelined produces a product every N cycles with P(bits^2/N) logic. Usual dividers are O(bits) space and O(bits) time. Newton-Raphson dividers use the pipelined multplier, and produce a quotient in a small multiple of the number of cycles to run the multiplier. For specific examples, the IBM 360/91 and Cray-1 are favorites in books on pipelined processors. http://product.half.ebay.com/The-Architecture-of-Pipelined-Computers-by-Peter-M-Kogge-1981-Hardcover/1202954 -- glen -- glen
