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IBM's PPC being open sourced .. what does this mean for embedded devices ?

Started by kristoff September 16, 2019
On 18/09/2019 00:39, kristoff wrote:
> >>> BTW. >>> Does anybody have an easy-to-use overview of different powerPC >>> architectures out there? (especially for embedded use) >> I'd be surprised if such a thing exists.  There are /many/ PPC >> variations. > > Can you explain the difference between the "books" and the Power ISA > versions, as found on the Wikipedia page here: > https://en.wikipedia.org/wiki/Power_ISA > >
AFAIK, the "books" are just the books specifying parts of the architecture. The way they are divided means it is possible for a particular implementation to support some books and not others, or at least some parts of a book and not others.
> > Also, what is the link between a particular core implementation and the > books / Isa. > > E.g. Say you would like to implement a very low-end ppc core for > embedded applications. > Do you need to implement the full ISA with all its features or are > certain parts of the ISA optional? > > (e.g. Is it mandatory to add a FPU to the core?) >
No, there are lots of things that can be optional. I have used perhaps 4 or 5 PPC microcontrollers (Motorola/Freescale/NXP) over the years, and they have varied substantially. Early ones had very limited interrupt capabilities, with everything handled manually - later ones did a good deal more in hardware. Some had no FPU, some had single-precision, some had double precision. I may be mixing up the details, but I think the one with single-precision floating point actually supported it as single-precision "vector" instructions of length 1, rather than supporting the FPU instructions. None of the ones I used supported 64-bit instructions, but some had 64-bit GPR's. None of them supported little-endian modes. Some had cache, others did not. One had support for VLE compressed instructions (like ARM Thumb-2 mode), one had support for an earlier scheme that was a kind of hardware Huffman encoding.